| /external/ltrace/ |
| D | TODO | 175 - The Floating-Point Control Register, FPCR, controls: — The
176 half-precision format where applicable, FPCR.AHP bit.
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| /external/v8/src/arm64/ |
| D | simulator-arm64.cc | 88 case FPCR: in DefaultValueFor()
410 fpcr_ = SimSystemRegister::DefaultValueFor(FPCR); in ResetState()
1083 PrintSystemRegister(FPCR); in PrintSystemRegisters()
1156 case FPCR: { in PrintSystemRegister()
3210 case FPCR: set_xreg(instr->Rt(), fpcr().RawValue()); break; in VisitSystem()
3221 case FPCR: in VisitSystem()
3223 LogSystemRegister(FPCR); in VisitSystem()
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| D | constants-arm64.h | 218 M_(FPCR, AHP_mask | DN_mask | FZ_mask | RMode_mask)
381 FPCR = ((0x1 << SysO0_offset) | enumerator
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| D | disasm-arm64.cc | 1142 case FPCR: form = "'Xt, fpcr"; break; in VisitSystem()
1151 case FPCR: form = "fpcr, 'Xt"; break; in VisitSystem()
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| D | macro-assembler-arm64.cc | 1365 Mrs(fpcr, FPCR); in AssertFPCRState()
1391 Mrs(fpcr, FPCR); in ConfigureFPCR()
1399 Msr(FPCR, fpcr); in ConfigureFPCR()
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| /external/valgrind/VEX/priv/ |
| D | host_arm64_defs.c | 1158 i->ARM64in.FPCR.toFPCR = toFPCR; in ARM64Instr_FPCR()
1159 i->ARM64in.FPCR.iReg = iReg; in ARM64Instr_FPCR()
1741 if (i->ARM64in.FPCR.toFPCR) { in ppARM64Instr()
1743 ppHRegARM64(i->ARM64in.FPCR.iReg); in ppARM64Instr()
1746 ppHRegARM64(i->ARM64in.FPCR.iReg); in ppARM64Instr()
2144 if (i->ARM64in.FPCR.toFPCR) in getRegUsage_ARM64Instr()
2145 addHRegUse(u, HRmRead, i->ARM64in.FPCR.iReg); in getRegUsage_ARM64Instr()
2147 addHRegUse(u, HRmWrite, i->ARM64in.FPCR.iReg); in getRegUsage_ARM64Instr()
2389 i->ARM64in.FPCR.iReg = lookupHRegRemap(m, i->ARM64in.FPCR.iReg); in mapRegs_ARM64Instr()
4169 Bool toFPCR = i->ARM64in.FPCR.toFPCR; in emit_ARM64Instr()
[all …]
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| D | host_arm64_defs.h | 785 } FPCR; member
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| /external/vixl/src/vixl/a64/ |
| D | simulator-a64.cc | 53 case FPCR: in DefaultValueFor()
105 fpcr_ = SimSystemRegister::DefaultValueFor(FPCR); in ResetState()
474 PrintSystemRegister(FPCR); in PrintSystemRegisters()
707 case FPCR: { in PrintSystemRegister()
2334 case FPCR: set_xreg(instr->Rt(), fpcr().RawValue()); break; in VisitSystem()
2345 case FPCR: in VisitSystem()
2347 LogSystemRegister(FPCR); in VisitSystem()
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| D | constants-a64.h | 180 M_(FPCR, AHP_mask | DN_mask | FZ_mask | RMode_mask)
341 FPCR = ((0x1 << SysO0_offset) | enumerator
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| D | disasm-a64.cc | 1301 case FPCR: form = "'Xt, fpcr"; break; in VisitSystem()
1310 case FPCR: form = "fpcr, 'Xt"; break; in VisitSystem()
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| /external/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.cpp | 422 {"fpcr", FPCR, {}},
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| D | AArch64BaseInfo.h | 821 FPCR = 0xda20, // 11 011 0100 0100 000 enumerator
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| /external/v8/test/cctest/ |
| D | test-assembler-arm64.cc | 185 __ Msr(FPCR, xzr);
8030 __ Mrs(x6, FPCR); in TEST()
8086 __ Msr(FPCR, x8); in TEST()
8087 __ Mrs(x8, FPCR); in TEST()
8093 __ Msr(FPCR, x9); in TEST()
8094 __ Mrs(x9, FPCR); in TEST()
8102 __ Msr(FPCR, x10); in TEST()
8103 __ Mrs(x10, FPCR); in TEST()
10644 __ Mrs(x0, FPCR); in DefaultNaNHelper()
10646 __ Msr(FPCR, x1); in DefaultNaNHelper()
[all …]
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| D | test-disasm-arm64.cc | 1573 COMPARE(mrs(x15, FPCR), "mrs x15, fpcr"); in TEST_()
1584 COMPARE(msr(FPCR, x15), "msr fpcr, x15"); in TEST_()
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| /external/llvm/test/MC/AArch64/ |
| D | basic-a64-instructions.s | 3827 msr FPCR, x12
4375 mrs x9, FPCR
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| /external/vixl/test/ |
| D | test-assembler-a64.cc | 12473 __ Mrs(x6, FPCR); in TEST()
12528 __ Msr(FPCR, x8); in TEST()
12529 __ Mrs(x8, FPCR); in TEST()
12535 __ Msr(FPCR, x9); in TEST()
12536 __ Mrs(x9, FPCR); in TEST()
12544 __ Msr(FPCR, x10); in TEST()
12545 __ Mrs(x10, FPCR); in TEST()
14789 __ Mrs(x0, FPCR); in DefaultNaNHelper()
14791 __ Msr(FPCR, x1); in DefaultNaNHelper()
14830 __ Msr(FPCR, x0); in DefaultNaNHelper()
[all …]
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| D | test-disasm-a64.cc | 2529 COMPARE(mrs(x15, FPCR), "mrs x15, fpcr"); in TEST()
2540 COMPARE(msr(FPCR, x15), "msr fpcr, x15"); in TEST()
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| /external/valgrind/memcheck/ |
| D | mc_machine.c | 1027 if (o == GOF(FPCR) && sz == 4) return -1; // untracked in get_otrack_shadow_offset_wrk()
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | basic-a64-instructions.txt | 3300 # CHECK: msr {{fpcr|FPCR}}, x12
3592 # CHECK: mrs x9, {{fpcr|FPCR}}
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