| /external/v8/test/cctest/ |
| D | test-assembler-arm64.cc | 6155 __ Fabs(s0, s16); in TEST() local
6156 __ Fabs(s1, s0); in TEST() local
6157 __ Fabs(s2, s17); in TEST() local
6158 __ Fabs(s3, s18); in TEST() local
6159 __ Fabs(d4, d19); in TEST() local
6160 __ Fabs(d5, d4); in TEST() local
6161 __ Fabs(d6, d20); in TEST() local
6162 __ Fabs(d7, d21); in TEST() local
10363 __ Fabs(d2, d0); in TEST() local
10367 __ Fabs(d12, d10); in TEST() local
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| /external/v8/src/compiler/arm64/ |
| D | code-generator-arm64.cc | 976 __ Fabs(i.OutputFloat32Register(), i.InputFloat32Register(0)); in AssembleArchInstruction() local
1031 __ Fabs(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); in AssembleArchInstruction() local
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| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineCompares.cpp | 4165 APFloat Fabs = F; in visitFCmpInst() local
4166 Fabs.clearSign(); in visitFCmpInst()
4168 ((Fabs.compare(APFloat::getSmallestNormalized(*Sem)) != in visitFCmpInst()
4169 APFloat::cmpLessThan) || Fabs.isZero())) in visitFCmpInst()
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| D | InstCombineAndOrXor.cpp | 1531 Function *Fabs = Intrinsic::getDeclaration(M, Intrinsic::fabs, SrcTy); in visitAnd() local
1532 Value *Call = Builder->CreateCall(Fabs, Op0COp, "fabs"); in visitAnd()
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| /external/llvm/lib/Transforms/Utils/ |
| D | SimplifyLibCalls.cpp | 1438 Value *Fabs = Intrinsic::getDeclaration(M, Intrinsic::fabs, ArgType); in optimizeSqrt() local
1439 Value *FabsCall = B.CreateCall(Fabs, RepeatOp, "fabs"); in optimizeSqrt()
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| /external/v8/src/crankshaft/arm64/ |
| D | lithium-codegen-arm64.cc | 162 __ Fabs(scratch_, value_); in Emit() local
170 __ Fabs(scratch_, value_); in EmitInverted() local
3432 __ Fabs(result, input); in DoMathAbs() local
3769 __ Fabs(result, input); in DoMathPowHalf() local
3842 __ Fabs(result, result); in DoMathRoundD() local
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| /external/v8/src/arm64/ |
| D | macro-assembler-arm64-inl.h | 542 void MacroAssembler::Fabs(const FPRegister& fd, const FPRegister& fn) { in Fabs() function
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| D | macro-assembler-arm64.h | 365 inline void Fabs(const FPRegister& fd, const FPRegister& fn);
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| D | code-stubs-arm64.cc | 875 __ Fabs(scratch1_double, base_double); in Generate() local
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| /external/vixl/test/ |
| D | test-assembler-a64.cc | 10270 __ Fabs(s0, s16); in TEST() local
10271 __ Fabs(s1, s0); in TEST() local
10272 __ Fabs(s2, s17); in TEST() local
10273 __ Fabs(s3, s18); in TEST() local
10274 __ Fabs(d4, d19); in TEST() local
10275 __ Fabs(d5, d4); in TEST() local
10276 __ Fabs(d6, d20); in TEST() local
10277 __ Fabs(d7, d21); in TEST() local
14511 __ Fabs(d2, d0); in TEST() local
14515 __ Fabs(d12, d10); in TEST() local
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| D | test-disasm-a64.cc | 4935 COMPARE(Fabs(v2.V2S(), v9.V2S()), "fabs v2.2s, v9.2s"); in TEST()
4936 COMPARE(Fabs(v16.V4S(), v23.V4S()), "fabs v16.4s, v23.4s"); in TEST()
4937 COMPARE(Fabs(v31.V2D(), v30.V2D()), "fabs v31.2d, v30.2d"); in TEST()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 2020 SDValue Fabs = DAG.getNode(ISD::FABS, SL, MVT::f64, Src); in LowerFRINT() local
2027 SDValue Cond = DAG.getSetCC(SL, SetCCVT, Fabs, C2, ISD::SETOGT); in LowerFRINT()
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| /external/vixl/src/vixl/a64/ |
| D | macro-assembler-a64.h | 2258 V(fabs, Fabs) \
|