| /external/vixl/examples/ |
| D | add4-double.cc | 45 __ Fadd(d0, d0, d1); in GenerateAdd4Double() local
46 __ Fadd(d2, d2, d3); in GenerateAdd4Double() local
47 __ Fadd(d0, d0, d2); in GenerateAdd4Double() local
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| D | add3-double.cc | 38 __ Fadd(d0, d0, d1); // d0 <- x + y in GenerateAdd3Double() local
39 __ Fadd(d0, d0, d2); // d0 <- d0 + z in GenerateAdd3Double() local
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| D | custom-disassembler.cc | 130 __ Fadd(d30, d16, d17); in GenerateCustomDisassemblerTestCode() local
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| /external/v8/test/cctest/ |
| D | test-assembler-arm64.cc | 5150 __ Fadd(s0, s17, s18); in TEST() local
5151 __ Fadd(s1, s18, s19); in TEST() local
5152 __ Fadd(s2, s14, s18); in TEST() local
5153 __ Fadd(s3, s15, s18); in TEST() local
5154 __ Fadd(s4, s16, s18); in TEST() local
5155 __ Fadd(s5, s15, s16); in TEST() local
5156 __ Fadd(s6, s16, s15); in TEST() local
5158 __ Fadd(d7, d30, d31); in TEST() local
5159 __ Fadd(d8, d29, d31); in TEST() local
5160 __ Fadd(d9, d26, d31); in TEST() local
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| /external/v8/src/arm64/ |
| D | codegen-arm64.cc | 616 __ Fadd(double_temp3, double_temp3, double_temp2); in EmitMathExp() local
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| D | macro-assembler-arm64-inl.h | 548 void MacroAssembler::Fadd(const FPRegister& fd, in Fadd() function
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| D | macro-assembler-arm64.h | 366 inline void Fadd(const FPRegister& fd,
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| D | code-stubs-arm64.cc | 846 __ Fadd(base_double, base_double, fp_zero); in Generate() local
864 __ Fadd(scratch0_double, scratch0_double, fp_zero); in Generate() local
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| /external/v8/src/compiler/arm64/ |
| D | code-generator-arm64.cc | 948 __ Fadd(i.OutputFloat32Register(), i.InputFloat32Register(0), in AssembleArchInstruction() local
992 __ Fadd(i.OutputDoubleRegister(), i.InputDoubleRegister(0), in AssembleArchInstruction() local
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| /external/vixl/test/ |
| D | test-assembler-a64.cc | 9236 __ Fadd(s0, s17, s18); in TEST() local
9237 __ Fadd(s1, s18, s19); in TEST() local
9238 __ Fadd(s2, s14, s18); in TEST() local
9239 __ Fadd(s3, s15, s18); in TEST() local
9240 __ Fadd(s4, s16, s18); in TEST() local
9241 __ Fadd(s5, s15, s16); in TEST() local
9242 __ Fadd(s6, s16, s15); in TEST() local
9244 __ Fadd(d7, d30, d31); in TEST() local
9245 __ Fadd(d8, d29, d31); in TEST() local
9246 __ Fadd(d9, d26, d31); in TEST() local
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| D | test-disasm-a64.cc | 3849 COMPARE(Fadd(v0.M, v1.M, v2.M), "fadd v0." S ", v1." S ", v2." S); in TEST()
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| /external/v8/src/crankshaft/arm64/ |
| D | lithium-codegen-arm64.cc | 1641 case Token::ADD: __ Fadd(result, left, right); break; in DoArithmeticD() local
3773 __ Fadd(double_scratch(), input, fp_zero); in DoMathPowHalf() local
3839 __ Fadd(result, input, scratch_d); in DoMathRoundD() local
3866 __ Fadd(temp, input, dot_five); in DoMathRoundI() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 2669 SDValue Fadd = DAG.getNode(ISD::FADD, dl, MVT::f64, Fmul, Fcvt2); in ExpandLegalINT_TO_FP() local
2670 return DAG.getNode(ISD::FP_ROUND, dl, MVT::f32, Fadd, in ExpandLegalINT_TO_FP()
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| /external/vixl/src/vixl/a64/ |
| D | macro-assembler-a64.h | 1144 void Fadd(const VRegister& vd, const VRegister& vn, const VRegister& vm) { in Fadd() function
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