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Searched refs:FeatureBits (Results 1 – 11 of 11) sorted by relevance

/external/llvm/lib/MC/
DMCSubtargetInfo.cpp28 FeatureBits = getFeatures(CPU, FS, ProcDesc, ProcFeatures); in InitMCProcessorInfo()
36 FeatureBits = getFeatures(CPU, FS, ProcDesc, ProcFeatures); in setDefaultFeatures()
54 FeatureBits.flip(FB); in ToggleFeature()
55 return FeatureBits; in ToggleFeature()
59 FeatureBits ^= FB; in ToggleFeature()
60 return FeatureBits; in ToggleFeature()
67 FeatureBits = Features.ToggleFeature(FeatureBits, FS, ProcFeatures); in ToggleFeature()
68 return FeatureBits; in ToggleFeature()
73 FeatureBits = Features.ApplyFeatureFlag(FeatureBits, FS, ProcFeatures); in ApplyFeatureFlag()
74 return FeatureBits; in ApplyFeatureFlag()
/external/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.cpp22 const FeatureBitset& FeatureBits, bool &Valid) const { in toString() argument
24 if (Mappings[i].isValueEqual(Value, FeatureBits)) { in toString()
35 const FeatureBitset& FeatureBits, bool &Valid) const { in fromString() argument
38 if (Mappings[i].isNameEqual(LowerCaseName, FeatureBits)) { in fromString()
838 const FeatureBitset& FeatureBits, bool &Valid) const { in fromString() argument
843 if (SysRegMappings[i].isNameEqual(NameLower, FeatureBits)) { in fromString()
852 if (InstMappings[i].isNameEqual(NameLower, FeatureBits)) { in fromString()
882 const FeatureBitset& FeatureBits) const { in toString()
885 if (SysRegMappings[i].isValueEqual(Bits, FeatureBits)) { in toString()
893 if (InstMappings[i].isValueEqual(Bits, FeatureBits)) { in toString()
DAArch64BaseInfo.h289 const FeatureBitset& FeatureBits) const { in isNameEqual()
291 (FeatureBitSet & FeatureBits).none()) in isNameEqual()
297 const FeatureBitset& FeatureBits) const { in isValueEqual()
299 (FeatureBitSet & FeatureBits).none()) in isValueEqual()
310 StringRef toString(uint32_t Value, const FeatureBitset& FeatureBits,
313 uint32_t fromString(StringRef Name, const FeatureBitset& FeatureBits,
1247 uint32_t fromString(StringRef Name, const FeatureBitset& FeatureBits,
1249 std::string toString(uint32_t Bits, const FeatureBitset& FeatureBits) const;
/external/llvm/include/llvm/MC/
DMCSubtargetInfo.h45 FeatureBitset FeatureBits; // Feature bits for current CPU + FS variable
72 return FeatureBits; in getFeatureBits()
78 FeatureBits = FeatureBits_; in setFeatureBits()
/external/deqp/external/vulkancts/modules/vulkan/ubo/
DvktRandomUniformBlockCase.hpp39 enum FeatureBits enum
/external/deqp/modules/glshared/
DglsRandomUniformBlockCase.hpp43 enum FeatureBits enum
/external/llvm/lib/Target/ARM/InstPrinter/
DARMInstPrinter.cpp800 const FeatureBitset &FeatureBits = STI.getFeatureBits(); in printMSRMaskOperand() local
802 if (FeatureBits[ARM::FeatureMClass]) { in printMSRMaskOperand()
807 if (Opcode == ARM::t2MSR_M && FeatureBits[ARM::FeatureDSP]) { in printMSRMaskOperand()
839 if (Opcode == ARM::t2MSR_M && FeatureBits [ARM::HasV7Ops]) { in printMSRMaskOperand()
/external/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp2140 const FeatureBitset &FeatureBits = Dis->getSubtargetInfo().getFeatureBits(); in DecodeSETPANInstruction() local
2142 if (!FeatureBits[ARM::HasV8_1aOps] || in DecodeSETPANInstruction()
2143 !FeatureBits[ARM::HasV8Ops]) in DecodeSETPANInstruction()
4072 const FeatureBitset &FeatureBits = in DecodeMSRMask() local
4075 if (FeatureBits[ARM::FeatureMClass]) { in DecodeMSRMask()
4095 if (!(FeatureBits[ARM::HasV7Ops])) in DecodeMSRMask()
4105 if (!(FeatureBits[ARM::HasV7Ops])) { in DecodeMSRMask()
4119 (!(FeatureBits[ARM::FeatureDSP]) && (Mask & 1))) in DecodeMSRMask()
/external/deqp/external/vulkancts/modules/vulkan/ssbo/
DvktSSBOLayoutTests.cpp47 enum FeatureBits enum
/external/deqp/modules/gles31/functional/
Des31fSSBOLayoutTests.cpp48 enum FeatureBits enum
/external/llvm/lib/Target/Mips/AsmParser/
DMipsAsmParser.cpp359 FeatureBitset FeatureBits = STI.getFeatureBits(); in selectArch() local
360 FeatureBits &= ~MipsAssemblerOptions::AllArchRelatedMask; in selectArch()
361 STI.setFeatureBits(FeatureBits); in selectArch()