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Searched refs:Fixups (Results 1 – 25 of 43) sorted by relevance

12

/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsMCCodeEmitter.h55 SmallVectorImpl<MCFixup> &Fixups,
61 SmallVectorImpl<MCFixup> &Fixups,
68 SmallVectorImpl<MCFixup> &Fixups,
75 SmallVectorImpl<MCFixup> &Fixups,
81 SmallVectorImpl<MCFixup> &Fixups,
85 SmallVectorImpl<MCFixup> &Fixups,
89 SmallVectorImpl<MCFixup> &Fixups,
95 SmallVectorImpl<MCFixup> &Fixups,
102 SmallVectorImpl<MCFixup> &Fixups,
109 SmallVectorImpl<MCFixup> &Fixups,
[all …]
DMipsMCCodeEmitter.cpp149 SmallVectorImpl<MCFixup> &Fixups, in encodeInstruction() argument
172 unsigned long N = Fixups.size(); in encodeInstruction()
173 uint32_t Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in encodeInstruction()
198 if (Fixups.size() > N) in encodeInstruction()
199 Fixups.pop_back(); in encodeInstruction()
203 Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI); in encodeInstruction()
222 SmallVectorImpl<MCFixup> &Fixups, in getBranchTargetOpValue() argument
235 Fixups.push_back(MCFixup::create(0, FixupExpression, in getBranchTargetOpValue()
245 SmallVectorImpl<MCFixup> &Fixups, in getBranchTarget7OpValueMM() argument
257 Fixups.push_back(MCFixup::create(0, Expr, in getBranchTarget7OpValueMM()
[all …]
/external/llvm/lib/Target/SystemZ/MCTargetDesc/
DSystemZMCCodeEmitter.cpp41 SmallVectorImpl<MCFixup> &Fixups,
47 SmallVectorImpl<MCFixup> &Fixups,
53 SmallVectorImpl<MCFixup> &Fixups,
61 SmallVectorImpl<MCFixup> &Fixups,
64 SmallVectorImpl<MCFixup> &Fixups,
67 SmallVectorImpl<MCFixup> &Fixups,
70 SmallVectorImpl<MCFixup> &Fixups,
73 SmallVectorImpl<MCFixup> &Fixups,
76 SmallVectorImpl<MCFixup> &Fixups,
85 SmallVectorImpl<MCFixup> &Fixups,
[all …]
/external/llvm/lib/Target/PowerPC/MCTargetDesc/
DPPCMCCodeEmitter.cpp52 SmallVectorImpl<MCFixup> &Fixups,
55 SmallVectorImpl<MCFixup> &Fixups,
58 SmallVectorImpl<MCFixup> &Fixups,
61 SmallVectorImpl<MCFixup> &Fixups,
64 SmallVectorImpl<MCFixup> &Fixups,
67 SmallVectorImpl<MCFixup> &Fixups,
70 SmallVectorImpl<MCFixup> &Fixups,
73 SmallVectorImpl<MCFixup> &Fixups,
76 SmallVectorImpl<MCFixup> &Fixups,
79 SmallVectorImpl<MCFixup> &Fixups,
[all …]
/external/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64MCCodeEmitter.cpp49 SmallVectorImpl<MCFixup> &Fixups,
55 SmallVectorImpl<MCFixup> &Fixups,
63 SmallVectorImpl<MCFixup> &Fixups,
69 SmallVectorImpl<MCFixup> &Fixups,
75 SmallVectorImpl<MCFixup> &Fixups,
81 SmallVectorImpl<MCFixup> &Fixups,
87 SmallVectorImpl<MCFixup> &Fixups,
94 SmallVectorImpl<MCFixup> &Fixups,
100 SmallVectorImpl<MCFixup> &Fixups,
106 SmallVectorImpl<MCFixup> &Fixups,
[all …]
/external/llvm/lib/Target/ARM/MCTargetDesc/
DARMMCCodeEmitter.cpp69 SmallVectorImpl<MCFixup> &Fixups,
75 SmallVectorImpl<MCFixup> &Fixups,
82 SmallVectorImpl<MCFixup> &Fixups,
87 SmallVectorImpl<MCFixup> &Fixups,
93 SmallVectorImpl<MCFixup> &Fixups,
99 SmallVectorImpl<MCFixup> &Fixups,
104 SmallVectorImpl<MCFixup> &Fixups,
109 SmallVectorImpl<MCFixup> &Fixups,
114 SmallVectorImpl<MCFixup> &Fixups,
120 SmallVectorImpl<MCFixup> &Fixups,
[all …]
/external/llvm/lib/Target/Sparc/MCTargetDesc/
DSparcMCCodeEmitter.cpp45 SmallVectorImpl<MCFixup> &Fixups,
51 SmallVectorImpl<MCFixup> &Fixups,
57 SmallVectorImpl<MCFixup> &Fixups,
61 SmallVectorImpl<MCFixup> &Fixups,
64 SmallVectorImpl<MCFixup> &Fixups,
67 SmallVectorImpl<MCFixup> &Fixups,
70 SmallVectorImpl<MCFixup> &Fixups,
83 SmallVectorImpl<MCFixup> &Fixups, in encodeInstruction() argument
85 unsigned Bits = getBinaryCodeForInstr(MI, Fixups, STI); in encodeInstruction()
105 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI); in encodeInstruction()
[all …]
DSparcMCExpr.h85 Sparc::Fixups getFixupKind() const { return getFixupKind(Kind); } in getFixupKind()
107 static Sparc::Fixups getFixupKind(VariantKind Kind);
/external/llvm/lib/Target/BPF/MCTargetDesc/
DBPFMCCodeEmitter.cpp44 SmallVectorImpl<MCFixup> &Fixups,
50 SmallVectorImpl<MCFixup> &Fixups,
54 SmallVectorImpl<MCFixup> &Fixups,
58 SmallVectorImpl<MCFixup> &Fixups,
77 SmallVectorImpl<MCFixup> &Fixups, in getMachineOpValue() argument
92 Fixups.push_back(MCFixup::create(0, Expr, FK_SecRel_4)); in getMachineOpValue()
94 Fixups.push_back(MCFixup::create(0, Expr, FK_SecRel_8)); in getMachineOpValue()
97 Fixups.push_back(MCFixup::create(0, Expr, FK_PCRel_2)); in getMachineOpValue()
108 SmallVectorImpl<MCFixup> &Fixups, in encodeInstruction() argument
115 uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI); in encodeInstruction()
[all …]
/external/llvm/lib/Target/WebAssembly/MCTargetDesc/
DWebAssemblyMCCodeEmitter.cpp43 SmallVectorImpl<MCFixup> &Fixups,
49 SmallVectorImpl<MCFixup> &Fixups,
53 SmallVectorImpl<MCFixup> &Fixups,
57 SmallVectorImpl<MCFixup> &Fixups,
69 const MCInst &MI, const MCOperand &MO, SmallVectorImpl<MCFixup> &Fixups, in getMachineOpValue() argument
86 const MCInst &MI, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups, in encodeInstruction() argument
94 SmallVectorImpl<MCFixup> &Fixups, in getMemoryOpValue() argument
/external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/
DAMDGPUMCCodeEmitter.h29 SmallVectorImpl<MCFixup> &Fixups) const;
32 SmallVectorImpl<MCFixup> &Fixups) const { in getMachineOpValue() argument
37 SmallVectorImpl<MCFixup> &Fixups) const { in GPR4AlignEncode() argument
41 SmallVectorImpl<MCFixup> &Fixups) const { in GPR2AlignEncode() argument
48 SmallVectorImpl<MCFixup> &Fixups) const { in i32LiteralEncode() argument
52 SmallVectorImpl<MCFixup> &Fixups) const { in SMRDmemriEncode() argument
DR600MCCodeEmitter.cpp54 SmallVectorImpl<MCFixup> &Fixups) const;
58 SmallVectorImpl<MCFixup> &Fixups) const;
61 void EmitALUInstr(const MCInst &MI, SmallVectorImpl<MCFixup> &Fixups,
66 SmallVectorImpl<MCFixup> &Fixups,
68 void EmitTexInstr(const MCInst &MI, SmallVectorImpl<MCFixup> &Fixups,
151 SmallVectorImpl<MCFixup> &Fixups) const { in EncodeInstruction()
153 EmitTexInstr(MI, Fixups, OS); in EncodeInstruction()
164 uint64_t inst = getBinaryCodeForInstr(MI, Fixups); in EncodeInstruction()
176 uint64_t InstWord01 = getBinaryCodeForInstr(MI, Fixups); in EncodeInstruction()
186 EmitALUInstr(MI, Fixups, OS); in EncodeInstruction()
[all …]
DSIMCCodeEmitter.cpp75 SmallVectorImpl<MCFixup> &Fixups) const;
79 SmallVectorImpl<MCFixup> &Fixups) const;
132 SmallVectorImpl<MCFixup> &Fixups) const { in EncodeInstruction()
133 uint64_t Encoding = getBinaryCodeForInstr(MI, Fixups); in EncodeInstruction()
142 SmallVectorImpl<MCFixup> &Fixups) const { in getMachineOpValue()
/external/llvm/lib/Target/AMDGPU/MCTargetDesc/
DSIMCCodeEmitter.cpp55 SmallVectorImpl<MCFixup> &Fixups,
60 SmallVectorImpl<MCFixup> &Fixups,
66 SmallVectorImpl<MCFixup> &Fixups,
182 SmallVectorImpl<MCFixup> &Fixups, in encodeInstruction() argument
185 uint64_t Encoding = getBinaryCodeForInstr(MI, Fixups, STI); in encodeInstruction()
229 SmallVectorImpl<MCFixup> &Fixups, in getSOPPBrEncoding() argument
236 Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc())); in getSOPPBrEncoding()
240 return getMachineOpValue(MI, MO, Fixups, STI); in getSOPPBrEncoding()
245 SmallVectorImpl<MCFixup> &Fixups, in getMachineOpValue() argument
253 Fixups.push_back(MCFixup::create(4, Expr, Kind, MI.getLoc())); in getMachineOpValue()
DR600MCCodeEmitter.cpp45 SmallVectorImpl<MCFixup> &Fixups,
50 SmallVectorImpl<MCFixup> &Fixups,
89 SmallVectorImpl<MCFixup> &Fixups, in encodeInstruction() argument
99 uint64_t InstWord01 = getBinaryCodeForInstr(MI, Fixups, STI); in encodeInstruction()
123 uint64_t Word01 = getBinaryCodeForInstr(MI, Fixups, STI); in encodeInstruction()
133 uint64_t Inst = getBinaryCodeForInstr(MI, Fixups, STI); in encodeInstruction()
DAMDGPUMCCodeEmitter.h32 SmallVectorImpl<MCFixup> &Fixups,
36 SmallVectorImpl<MCFixup> &Fixups, in getMachineOpValue() argument
42 SmallVectorImpl<MCFixup> &Fixups, in getSOPPBrEncoding() argument
DAMDGPUFixupKinds.h17 enum Fixups { enum
/external/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCCodeEmitter.h37 const MCExpr *ME, SmallVectorImpl<MCFixup> &Fixups,
48 SmallVectorImpl<MCFixup> &Fixups,
52 SmallVectorImpl<MCFixup> &Fixups,
59 SmallVectorImpl<MCFixup> &Fixups,
64 SmallVectorImpl<MCFixup> &Fixups,
DHexagonMCCodeEmitter.cpp68 SmallVectorImpl<MCFixup> &Fixups, in encodeInstruction() argument
81 EncodeSingleInstruction(HMI, OS, Fixups, STI, in encodeInstruction()
93 const MCInst &MI, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups, in EncodeSingleInstruction() argument
161 Binary = getBinaryCodeForInstr(HMB, Fixups, STI); in EncodeSingleInstruction()
244 unsigned subInstSlot0Bits = getBinaryCodeForInstr(*subInst0, Fixups, STI); in EncodeSingleInstruction()
246 unsigned subInstSlot1Bits = getBinaryCodeForInstr(*subInst1, Fixups, STI); in EncodeSingleInstruction()
254 static Hexagon::Fixups getFixupNoBits(MCInstrInfo const &MCII, const MCInst &MI, in getFixupNoBits()
394 SmallVectorImpl<MCFixup> &Fixups, in getExprOpValue() argument
408 getExprOpValue(MI, MO, cast<MCBinaryExpr>(ME)->getLHS(), Fixups, STI); in getExprOpValue()
409 getExprOpValue(MI, MO, cast<MCBinaryExpr>(ME)->getRHS(), Fixups, STI); in getExprOpValue()
[all …]
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp125 SmallVectorImpl<MCFixup> &Fixups,
149 SmallVectorImpl<MCFixup> &Fixups,
153 SmallVectorImpl<MCFixup> &Fixups,
296 SmallVectorImpl<MCFixup> &Fixups, int ImmOffset) const { in EmitImmediate() argument
358 Fixups.push_back(MCFixup::create(CurByte, Expr, FixupKind, Loc)); in EmitImmediate()
366 SmallVectorImpl<MCFixup> &Fixups, in EmitMemModRMByte() argument
397 CurByte, OS, Fixups, -ImmSize); in EmitMemModRMByte()
448 EmitImmediate(Disp, MI.getLoc(), 1, FK_Data_1, CurByte, OS, Fixups); in EmitMemModRMByte()
459 EmitImmediate(Disp, MI.getLoc(), 2, FK_Data_2, CurByte, OS, Fixups); in EmitMemModRMByte()
480 EmitImmediate(Disp, MI.getLoc(), 4, FK_Data_4, CurByte, OS, Fixups); in EmitMemModRMByte()
[all …]
DX86FixupKinds.h17 enum Fixups { enum
/external/llvm/lib/MC/
DWinCOFFStreamer.cpp48 SmallVector<MCFixup, 4> Fixups; in EmitInstToData() local
51 getAssembler().getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI); in EmitInstToData()
54 for (unsigned i = 0, e = Fixups.size(); i != e; ++i) { in EmitInstToData()
55 Fixups[i].setOffset(Fixups[i].getOffset() + DF->getContents().size()); in EmitInstToData()
56 DF->getFixups().push_back(Fixups[i]); in EmitInstToData()
DMCELFStreamer.cpp475 SmallVector<MCFixup, 4> Fixups; in EmitInstToData() local
478 Assembler.getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI); in EmitInstToData()
480 for (unsigned i = 0, e = Fixups.size(); i != e; ++i) in EmitInstToData()
481 fixSymbolsInTLSFixups(Fixups[i].getValue()); in EmitInstToData()
515 else if (!isBundleLocked() && Fixups.size() == 0) { in EmitInstToData()
543 for (unsigned i = 0, e = Fixups.size(); i != e; ++i) { in EmitInstToData()
544 Fixups[i].setOffset(Fixups[i].getOffset() + DF->getContents().size()); in EmitInstToData()
545 DF->getFixups().push_back(Fixups[i]); in EmitInstToData()
/external/llvm/include/llvm/MC/
DMCAssembler.h202 SmallVector<MCFixup, FixupsSize> Fixups;
215 SmallVectorImpl<MCFixup> &getFixups() { return Fixups; }
216 const SmallVectorImpl<MCFixup> &getFixups() const { return Fixups; }
218 fixup_iterator fixup_begin() { return Fixups.begin(); }
219 const_fixup_iterator fixup_begin() const { return Fixups.begin(); }
221 fixup_iterator fixup_end() { return Fixups.end(); }
222 const_fixup_iterator fixup_end() const { return Fixups.end(); }
/external/llvm/lib/Target/AMDGPU/
DAMDGPUMCInstLower.cpp123 SmallVector<MCFixup, 4> Fixups; in EmitInstruction() local
129 InstEmitter.encodeInstruction(TmpInst, CodeStream, Fixups, in EmitInstruction()

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