/external/llvm/lib/Target/Hexagon/ |
D | HexagonFrameLowering.cpp | 301 auto &HRI = *HST.getRegisterInfo(); in findShrunkPrologEpilog() local 332 for (const MCPhysReg *P = HRI.getCalleeSavedRegs(&MF); *P; ++P) in findShrunkPrologEpilog() 397 auto &HRI = *HST.getRegisterInfo(); in emitPrologue() local 407 insertCSRSpillsInBlock(*PrologB, CSI, HRI); in emitPrologue() 411 insertCSRRestoresInBlock(*EpilogB, CSI, HRI); in emitPrologue() 416 insertCSRRestoresInBlock(B, CSI, HRI); in emitPrologue() 430 auto &HRI = *HST.getRegisterInfo(); in insertPrologueInBlock() local 449 unsigned SP = HRI.getStackRegister(); in insertPrologueInBlock() 483 unsigned CallerSavedReg = HRI.getFirstCallerSavedNonParamReg(); in insertPrologueInBlock() 509 auto &HRI = *HST.getRegisterInfo(); in insertEpilogueInBlock() local [all …]
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D | HexagonVLIWPacketizer.cpp | 87 const HexagonRegisterInfo *HRI; member in __anon637f1d3f0111::HexagonPacketizer 108 HRI = MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in INITIALIZE_PASS_DEPENDENCY() 175 HRI = MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in runOnMachineFunction() 268 if (DepReg == HRI->getRARegister()) in isCallDependent() 272 if (DepReg == HRI->getFrameRegister() || DepReg == HRI->getStackRegister()) in isCallDependent() 276 const TargetRegisterClass* RC = HRI->getMinimalPhysRegClass(DepReg); in isCallDependent() 538 const TargetRegisterClass *PacketRC = HII->getRegClass(MCID, 0, HRI, MF); in canPromoteToNewValueStore() 588 predRegClass = HRI->getMinimalPhysRegClass(predRegNumSrc); in canPromoteToNewValueStore() 600 predRegClass = HRI->getMinimalPhysRegClass(predRegNumDst); in canPromoteToNewValueStore() 646 if (MO.isReg() && TempSU->getInstr()->modifiesRegister(MO.getReg(), HRI)) in canPromoteToNewValueStore() [all …]
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D | HexagonInstrInfo.cpp | 113 static bool isDblRegForSubInst(unsigned Reg, const HexagonRegisterInfo &HRI) { in isDblRegForSubInst() argument 114 return isIntRegForSubInst(HRI.getSubReg(Reg, Hexagon::subreg_loreg)) && in isDblRegForSubInst() 115 isIntRegForSubInst(HRI.getSubReg(Reg, Hexagon::subreg_hireg)); in isDblRegForSubInst() 599 auto &HRI = getRegisterInfo(); in copyPhysReg() local 660 addReg(HRI.getSubReg(SrcReg, Hexagon::subreg_hireg), in copyPhysReg() 662 addReg(HRI.getSubReg(SrcReg, Hexagon::subreg_loreg), in copyPhysReg() 684 HRI.getSubReg(DestReg, Hexagon::subreg_hireg)). in copyPhysReg() 685 addReg(HRI.getSubReg(SrcReg, Hexagon::subreg_hireg), in copyPhysReg() 688 HRI.getSubReg(DestReg, Hexagon::subreg_loreg)). in copyPhysReg() 689 addReg(HRI.getSubReg(SrcReg, Hexagon::subreg_loreg), in copyPhysReg() [all …]
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D | HexagonGenMux.cpp | 42 HexagonGenMux() : MachineFunctionPass(ID), HII(0), HRI(0) { in HexagonGenMux() 55 const HexagonRegisterInfo *HRI; member in __anondc5b75df0111::HexagonGenMux 105 for (MCSubRegIterator I(Reg, HRI); I.isValid(); ++I) in getSubRegs() 144 unsigned NR = HRI->getNumRegs(); in buildMaps() 309 HRI = MF.getSubtarget<HexagonSubtarget>().getRegisterInfo(); in runOnMachineFunction()
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D | HexagonGenInsert.cpp | 469 HexagonGenInsert() : MachineFunctionPass(ID), HII(0), HRI(0) { in HexagonGenInsert() 525 const HexagonRegisterInfo *HRI; member in __anon53296d7a0911::HexagonGenInsert 544 dbgs() << " " << PrintReg(I->first, HRI) << ":\n"; in dump_map() 547 dbgs() << " " << PrintIFR(LL[i].first, HRI) << ", " in dump_map() 548 << PrintRegSet(LL[i].second, HRI) << '\n'; in dump_map() 762 dbgs() << LLVM_FUNCTION_NAME << ": " << PrintReg(VR, HRI) in findRecordInsertForms() 763 << " AVs: " << PrintORL(AVs, HRI) << "\n"; in findRecordInsertForms() 826 dbgs() << "Prefixes matching register " << PrintReg(VR, HRI) << "\n"; in findRecordInsertForms() 831 dbgs() << " (" << PrintReg(LL[i].first, HRI) << ",@" in findRecordInsertForms() 879 dbgs() << PrintReg(VR, HRI) << " = insert(" << PrintReg(SrcR, HRI) in findRecordInsertForms() [all …]
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D | HexagonFrameLowering.h | 89 const HexagonRegisterInfo &HRI) const; 91 const HexagonRegisterInfo &HRI) const;
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D | HexagonVLIWPacketizer.h | 41 const HexagonRegisterInfo *HRI; variable
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D | HexagonBitSimplify.cpp | 2179 auto &HRI = *HST.getRegisterInfo(); in runOnMachineFunction() local 2188 const HexagonEvaluator HE(HRI, MRI, HII, MF); in runOnMachineFunction() 2208 CopyPropagation CopyP(HRI, MRI); in runOnMachineFunction() 2302 HII(0), HRI(0), MRI(0), BTP(0) { in HexagonLoopRescheduling() 2310 const HexagonRegisterInfo *HRI; member in __anon3f9b49d70911::HexagonLoopRescheduling 2548 dbgs() << ' ' << PrintReg(I.DefR, HRI) << "=phi(" in processLoop() 2549 << PrintReg(I.PR.Reg, HRI, I.PR.Sub) << ":b" << I.PB->getNumber() in processLoop() 2550 << ',' << PrintReg(I.LR.Reg, HRI, I.LR.Sub) << ":b" in processLoop() 2670 << PrintReg(G.Inp.Reg, HRI, G.Inp.Sub) in processLoop() 2671 << " out: " << PrintReg(G.Out.Reg, HRI, G.Out.Sub) << "\n"; in processLoop() [all …]
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D | HexagonISelLowering.cpp | 712 auto &HRI = *Subtarget.getRegisterInfo(); in LowerCall() local 714 DAG.getCopyFromReg(Chain, dl, HRI.getStackRegister(), PtrVT); in LowerCall() 1402 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in LowerRETURNADDR() local 1422 unsigned Reg = MF.addLiveIn(HRI.getRARegister(), getRegClassFor(MVT::i32)); in LowerRETURNADDR() 1428 const HexagonRegisterInfo &HRI = *Subtarget.getRegisterInfo(); in LowerFRAMEADDR() local 1436 HRI.getFrameRegister(), VT); in LowerFRAMEADDR() 1519 auto &HRI = *Subtarget.getRegisterInfo(); in HexagonTargetLowering() local 1528 setStackPointerRegisterToSaveRestore(HRI.getStackRegister()); in HexagonTargetLowering() 1891 computeRegisterProperties(&HRI); in HexagonTargetLowering()
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D | HexagonISelDAGToDAG.cpp | 54 const HexagonRegisterInfo *HRI; member in __anon06b755f30111::HexagonDAGToDAGISel 59 HRI(nullptr) { in HexagonDAGToDAGISel() 67 HRI = HST->getRegisterInfo(); in runOnMachineFunction()
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/external/icu/icu4j/perf-tests/data/collation/ |
D | TestNames_SerbianSH.txt | 19358 HRIČANEK MIROSLAV 19359 HRIČANEK NEDELJKA
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