Searched refs:INSERT_SUBVECTOR (Results 1 – 13 of 13) sorted by relevance
| /external/llvm/lib/Target/X86/ |
| D | X86IntrinsicsInfo.h | 747 ISD::INSERT_SUBVECTOR, 0),
749 ISD::INSERT_SUBVECTOR, 0),
751 ISD::INSERT_SUBVECTOR, 0),
753 ISD::INSERT_SUBVECTOR, 0),
755 ISD::INSERT_SUBVECTOR, 0),
757 ISD::INSERT_SUBVECTOR, 0),
759 ISD::INSERT_SUBVECTOR, 0),
761 ISD::INSERT_SUBVECTOR, 0),
763 ISD::INSERT_SUBVECTOR, 0),
765 ISD::INSERT_SUBVECTOR, 0),
[all …]
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| D | X86ISelLowering.cpp | 702 setOperationAction(ISD::INSERT_SUBVECTOR, VT,Expand); in X86TargetLowering()
1286 setOperationAction(ISD::INSERT_SUBVECTOR, VT, Custom); in X86TargetLowering()
1481 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v16i1, Custom); in X86TargetLowering()
1605 setOperationAction(ISD::INSERT_SUBVECTOR, VT, Custom); in X86TargetLowering()
1640 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v32i1, Custom); in X86TargetLowering()
1641 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v64i1, Custom); in X86TargetLowering()
1642 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v32i16, Custom); in X86TargetLowering()
1643 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v64i8, Custom); in X86TargetLowering()
1710 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v8i1, Custom); in X86TargetLowering()
1711 setOperationAction(ISD::INSERT_SUBVECTOR, MVT::v4i1, Custom); in X86TargetLowering()
[all …]
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 291 INSERT_SUBVECTOR, enumerator
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 220 case ISD::INSERT_SUBVECTOR: return "insert_subvector"; in getOperationName()
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| D | LegalizeVectorTypes.cpp | 601 case ISD::INSERT_SUBVECTOR: SplitVecRes_INSERT_SUBVECTOR(N, Lo, Hi); break; in SplitVectorResult()
3036 ISD::INSERT_SUBVECTOR, DL, FixedVT, DAG.getUNDEF(FixedVT), InOp, in WidenVecOp_EXTEND()
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| D | DAGCombiner.cpp | 1442 case ISD::INSERT_SUBVECTOR: return visitINSERT_SUBVECTOR(N); in visit()
13019 if (V->getOpcode() == ISD::INSERT_SUBVECTOR) { in visitEXTRACT_SUBVECTOR()
13088 case ISD::INSERT_SUBVECTOR: { in simplifyShuffleOperandRecursively()
13113 V = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, VT, in simplifyShuffleOperandRecursively()
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| D | LegalizeDAG.cpp | 3197 case ISD::INSERT_SUBVECTOR: in ExpandNode()
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| D | SelectionDAG.cpp | 3948 case ISD::INSERT_SUBVECTOR: { in getNode()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1768 ISD::EXTRACT_SUBVECTOR, ISD::INSERT_SUBVECTOR, in HexagonTargetLowering()
1795 setOperationAction(ISD::INSERT_SUBVECTOR, NativeVT, Custom); in HexagonTargetLowering()
2584 case ISD::INSERT_SUBVECTOR: return LowerINSERT_VECTOR(Op, DAG); in LowerOperation()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 553 def insert_subvector : SDNode<"ISD::INSERT_SUBVECTOR", SDTSubVecInsert, []>;
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 214 case ISD::INSERT_SUBVECTOR: in SITargetLowering()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 423 if (SV.getOpcode() != ISD::INSERT_SUBVECTOR) in checkHighLaneIndex()
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| D | AArch64ISelLowering.cpp | 4807 return DAG.getNode(ISD::INSERT_SUBVECTOR, DL, WideTy, DAG.getUNDEF(WideTy), in WidenVector()
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