| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsNaClELFStreamer.cpp | 150 bool IsStore; in EmitInstruction() local
152 &IsStore); in EmitInstruction()
158 bool MaskAfter = IsSPFirstOperand && !IsStore; in EmitInstruction()
203 bool *IsStore) { in isBasePlusOffsetMemoryAccess() argument
204 if (IsStore) in isBasePlusOffsetMemoryAccess()
205 *IsStore = false; in isBasePlusOffsetMemoryAccess()
235 if (IsStore) in isBasePlusOffsetMemoryAccess()
236 *IsStore = true; in isBasePlusOffsetMemoryAccess()
243 if (IsStore) in isBasePlusOffsetMemoryAccess()
244 *IsStore = true; in isBasePlusOffsetMemoryAccess()
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| D | MipsMCNaCl.h | 21 bool *IsStore = nullptr);
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| /external/llvm/lib/CodeGen/ |
| D | AtomicExpandPass.cpp | 51 bool IsStore, bool IsLoad);
103 bool IsStore, IsLoad; in runOnFunction() local
108 IsStore = false; in runOnFunction()
113 IsStore = true; in runOnFunction()
119 IsStore = IsLoad = true; in runOnFunction()
130 IsStore = IsLoad = true; in runOnFunction()
134 MadeChange |= bracketInstWithFences(I, FenceOrdering, IsStore, IsLoad); in runOnFunction()
179 bool IsStore, bool IsLoad) { in bracketInstWithFences() argument
182 auto LeadingFence = TLI->emitLeadingFence(Builder, Order, IsStore, IsLoad); in bracketInstWithFences()
184 auto TrailingFence = TLI->emitTrailingFence(Builder, Order, IsStore, IsLoad); in bracketInstWithFences()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCVSXSwapRemoval.cpp | 79 unsigned int IsStore : 1; member
365 SwapVector[VecIdx].IsStore = 1; in gatherVectorInstructions()
371 SwapVector[VecIdx].IsStore = 1; in gatherVectorInstructions()
675 SwapVector[UseIdx].IsStore) { in recordUnoptimizableWebs()
691 } else if (SwapVector[EntryIdx].IsStore && SwapVector[EntryIdx].IsSwap) { in recordUnoptimizableWebs()
698 SwapVector[DefIdx].IsStore) { in recordUnoptimizableWebs()
744 } else if (SwapVector[EntryIdx].IsStore && SwapVector[EntryIdx].IsSwap) { in markSwapsForRemoval()
940 if (SwapVector[EntryIdx].IsStore) in dumpSwapVector()
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| D | PPCISelLowering.h | 512 bool IsStore, bool IsLoad) const override;
514 bool IsStore, bool IsLoad) const override;
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXInstrFormats.td | 37 bit IsStore = 0;
53 let TSFlags{6-6} = IsStore;
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| /external/v8/test/unittests/compiler/ |
| D | change-lowering-unittest.cc | 196 IsStore(StoreRepresentation(MachineRepresentation::kTagged, in TARGET_TEST_P()
215 IsStore(StoreRepresentation(MachineRepresentation::kTagged, in TARGET_TEST_P()
261 IsStore(StoreRepresentation(MachineRepresentation::kTagged, in TARGET_TEST_P()
285 IsStore(StoreRepresentation(MachineRepresentation::kWord8, in TARGET_TEST_P()
378 IsStore( in TARGET_TEST_F()
482 IsStore( in TARGET_TEST_F()
611 IsStore( in TARGET_TEST_F()
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| D | interpreter-assembler-unittest.h | 35 Matcher<Node*> IsStore(const Matcher<StoreRepresentation>& rep_matcher,
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| D | interpreter-assembler-unittest.cc | 76 Matcher<Node*> InterpreterAssemblerTest::InterpreterAssemblerForTest::IsStore( in IsStore() function in v8::internal::compiler::InterpreterAssemblerTest::InterpreterAssemblerForTest
80 return ::i::compiler::IsStore(rep_matcher, base_matcher, index_matcher, in IsStore()
444 m.IsStore(StoreRepresentation(MachineRepresentation::kTagged, in TARGET_TEST_F()
574 m.IsStore(StoreRepresentation(MachineRepresentation::kTagged, in TARGET_TEST_F()
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| D | machine-operator-reducer-unittest.cc | 1579 IsStore(rep, base, index, value, effect, control)); in TEST_F()
1603 IsStore(rep, base, index, value, effect, control)); in TEST_F()
1626 IsStore(rep, base, index, value, effect, control)); in TEST_F()
1651 IsStore(rep, base, index, value, effect, control)); in TEST_F()
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| D | node-test-utils.h | 256 Matcher<Node*> IsStore(const Matcher<StoreRepresentation>& rep_matcher,
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| D | node-test-utils.cc | 1999 Matcher<Node*> IsStore(const Matcher<StoreRepresentation>& rep_matcher, in IsStore() function
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| /external/clang/lib/CodeGen/ |
| D | CGAtomic.cpp | 1032 bool IsStore = E->getOp() == AtomicExpr::AO__c11_atomic_store || in EmitAtomicExpr() local
1048 if (IsStore) in EmitAtomicExpr()
1060 if (IsLoad || IsStore) in EmitAtomicExpr()
1089 if (!IsStore) in EmitAtomicExpr()
1093 if (!IsLoad && !IsStore) in EmitAtomicExpr()
1110 if (!IsStore) { in EmitAtomicExpr()
1128 if (!IsLoad && !IsStore) { in EmitAtomicExpr()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 443 bool IsStore, bool IsLoad) const override;
445 bool IsStore, bool IsLoad) const override;
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| D | ARMLoadStoreOptimizer.cpp | 456 bool IsStore = in UpdateBaseRegUses() local
459 if (IsLoad || IsStore) { in UpdateBaseRegUses()
472 if (Offset >= 0 && !(IsStore && InstrSrcReg == Base)) in UpdateBaseRegUses()
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| D | ARMISelLowering.cpp | 11869 AtomicOrdering Ord, bool IsStore, in emitLeadingFence() argument
11882 if (!IsStore) in emitLeadingFence()
11897 AtomicOrdering Ord, bool IsStore, in emitTrailingFence() argument
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| /external/v8/src/arm64/ |
| D | instructions-arm64.cc | 43 bool Instruction::IsStore() const { in IsStore() function in v8::internal::Instruction
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| D | instructions-arm64.h | 232 bool IsStore() const;
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| D | simulator-arm64.cc | 1602 if (instr->IsStore()) { in LoadStoreHelper()
1704 if (instr->IsStore()) { in LoadStorePairHelper()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonExpandCondsets.cpp | 853 bool IsLoad = TheI->mayLoad(), IsStore = TheI->mayStore(); in canMoveMemTo() local
854 if (!IsLoad && !IsStore) in canMoveMemTo()
876 bool Conflict = (L && IsStore) || S; in canMoveMemTo()
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| /external/vixl/src/vixl/a64/ |
| D | instructions-a64.cc | 104 bool Instruction::IsStore() const { in IsStore() function in vixl::Instruction
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| D | instructions-a64.h | 270 bool IsStore() const;
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| /external/llvm/include/llvm/Target/ |
| D | TargetLowering.h | 1091 AtomicOrdering Ord, bool IsStore, in emitLeadingFence() argument
1096 if (isAtLeastRelease(Ord) && IsStore) in emitLeadingFence()
1103 AtomicOrdering Ord, bool IsStore, in emitTrailingFence() argument
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| /external/llvm/lib/Target/X86/ |
| D | X86MCInstLower.cpp | 355 bool IsStore = Inst.getOperand(0).isReg() && Inst.getOperand(1).isReg(); in SimplifyShortMoveForm() local
356 unsigned AddrBase = IsStore; in SimplifyShortMoveForm()
357 unsigned RegOp = IsStore ? 0 : 5; in SimplifyShortMoveForm()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 9074 bool IsStore = false; in performNEONPostLDSTCombine() local
9089 NumVecs = 2; IsStore = true; break; in performNEONPostLDSTCombine()
9091 NumVecs = 3; IsStore = true; break; in performNEONPostLDSTCombine()
9093 NumVecs = 4; IsStore = true; break; in performNEONPostLDSTCombine()
9101 NumVecs = 2; IsStore = true; break; in performNEONPostLDSTCombine()
9103 NumVecs = 3; IsStore = true; break; in performNEONPostLDSTCombine()
9105 NumVecs = 4; IsStore = true; break; in performNEONPostLDSTCombine()
9119 NumVecs = 2; IsStore = true; IsLaneOp = true; break; in performNEONPostLDSTCombine()
9121 NumVecs = 3; IsStore = true; IsLaneOp = true; break; in performNEONPostLDSTCombine()
9123 NumVecs = 4; IsStore = true; IsLaneOp = true; break; in performNEONPostLDSTCombine()
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