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Searched refs:LLVMTargetMachine (Results 1 – 25 of 36) sorted by relevance

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/external/llvm/lib/CodeGen/
DLLVMTargetMachine.cpp45 void LLVMTargetMachine::initAsmInfo() { in initAsmInfo()
74 LLVMTargetMachine::LLVMTargetMachine(const Target &T, in LLVMTargetMachine() function in LLVMTargetMachine
84 TargetIRAnalysis LLVMTargetMachine::getTargetIRAnalysis() { in getTargetIRAnalysis()
92 addPassesToGenerateCode(LLVMTargetMachine *TM, PassManagerBase &PM, in addPassesToGenerateCode()
149 bool LLVMTargetMachine::addPassesToEmitFile( in addPassesToEmitFile()
237 bool LLVMTargetMachine::addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx, in addPassesToEmitMC()
DAndroid.mk51 LLVMTargetMachine.cpp \
/external/llvm/include/llvm/Target/
DTargetMachine.h273 class LLVMTargetMachine : public TargetMachine {
275 LLVMTargetMachine(const Target &T, StringRef DataLayoutString,
/external/llvm/lib/Target/BPF/
DBPFTargetMachine.h21 class BPFTargetMachine : public LLVMTargetMachine {
DBPFTargetMachine.cpp44 : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, RM, CM, in BPFTargetMachine()
/external/llvm/lib/Target/MSP430/
DMSP430TargetMachine.h26 class MSP430TargetMachine : public LLVMTargetMachine {
DMSP430TargetMachine.cpp33 : LLVMTargetMachine(T, "e-m:e-p:16:16-i32:16:32-a:16-n8:16", TT, CPU, FS, in MSP430TargetMachine()
/external/llvm/lib/Target/XCore/
DXCoreTargetMachine.h22 class XCoreTargetMachine : public LLVMTargetMachine {
DXCoreTargetMachine.cpp30 : LLVMTargetMachine( in XCoreTargetMachine()
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyTargetMachine.h24 class WebAssemblyTargetMachine final : public LLVMTargetMachine {
DWebAssemblyTargetMachine.cpp48 : LLVMTargetMachine(T, TT.isArch64Bit() ? "e-p:64:64-i64:64-n32:64-S128" in WebAssemblyTargetMachine()
/external/llvm/lib/Target/SystemZ/
DSystemZTargetMachine.h25 class SystemZTargetMachine : public LLVMTargetMachine {
DSystemZTargetMachine.cpp87 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, FS), TT, CPU, FS, Options, in SystemZTargetMachine()
/external/llvm/lib/Target/Hexagon/
DHexagonTargetMachine.h26 class HexagonTargetMachine : public LLVMTargetMachine {
/external/llvm/lib/Target/X86/
DX86TargetMachine.h25 class X86TargetMachine final : public LLVMTargetMachine {
/external/mesa3d/src/gallium/drivers/radeon/
DAMDGPUTargetMachine.h29 class AMDGPUTargetMachine : public LLVMTargetMachine {
DAMDGPUTargetMachine.cpp48 LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OptLevel), in AMDGPUTargetMachine()
/external/llvm/lib/Target/AArch64/
DAArch64TargetMachine.h24 class AArch64TargetMachine : public LLVMTargetMachine {
/external/llvm/lib/Target/AMDGPU/
DAMDGPUTargetMachine.h31 class AMDGPUTargetMachine : public LLVMTargetMachine {
/external/llvm/lib/Target/Sparc/
DSparcTargetMachine.h23 class SparcTargetMachine : public LLVMTargetMachine {
DSparcTargetMachine.cpp62 : LLVMTargetMachine(T, computeDataLayout(TT, is64bit), TT, CPU, FS, Options, in SparcTargetMachine()
/external/llvm/lib/Target/NVPTX/
DNVPTXTargetMachine.h27 class NVPTXTargetMachine : public LLVMTargetMachine {
/external/llvm/lib/Target/PowerPC/
DPPCTargetMachine.h26 class PPCTargetMachine : public LLVMTargetMachine {
/external/llvm/lib/Target/Mips/
DMipsTargetMachine.h29 class MipsTargetMachine : public LLVMTargetMachine {
/external/llvm/lib/Target/ARM/
DARMTargetMachine.h24 class ARMBaseTargetMachine : public LLVMTargetMachine {

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