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Searched refs:Lo1 (Results 1 – 4 of 4) sorted by relevance

/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelDAGToDAG.cpp723 SDNode *Lo1 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, in SelectADD_SUB_I64() local
729 SDValue AddLoArgs[] = { SDValue(Lo0, 0), SDValue(Lo1, 0) }; in SelectADD_SUB_I64()
DSIISelLowering.cpp1395 SDValue Lo1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, RHS, Zero); in LowerSELECT() local
1397 SDValue Lo = DAG.getSelect(DL, MVT::i32, Cond, Lo0, Lo1); in LowerSELECT()
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorTypes.cpp1938 SDValue Lo0, Hi0, Lo1, Hi1, LoRes, HiRes; in SplitVecOp_VSETCC() local
1941 GetSplitVector(N->getOperand(1), Lo1, Hi1); in SplitVecOp_VSETCC()
1946 LoRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Lo0, Lo1, N->getOperand(2)); in SplitVecOp_VSETCC()
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp6166 ConstantSDNode *Lo1 = dyn_cast<ConstantSDNode>(BVN->getOperand(LoElt+2)); in isExtendedBUILD_VECTOR() local
6168 if (!Lo0 || !Hi0 || !Lo1 || !Hi1) in isExtendedBUILD_VECTOR()
6172 Hi1->getSExtValue() == Lo1->getSExtValue() >> 32) in isExtendedBUILD_VECTOR()