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Searched refs:MIs (Results 1 – 5 of 5) sorted by relevance

/external/llvm/lib/Target/AMDGPU/
DR600OptimizeVectorRegisters.cpp237 std::vector<MachineInstr *> &MIs = (*It).second; in RemoveMI() local
238 MIs.erase(std::find(MIs.begin(), MIs.end(), MI), MIs.end()); in RemoveMI()
242 std::vector<MachineInstr *> &MIs = (*It).second; in RemoveMI() local
243 MIs.erase(std::find(MIs.begin(), MIs.end(), MI), MIs.end()); in RemoveMI()
300 std::vector<MachineInstr *> &MIs = in tryMergeUsingFreeSlot() local
302 CompatibleRSI = PreviousRegSeq[MIs.back()]; in tryMergeUsingFreeSlot()
DR600InstrInfo.h139 bool fitsReadPortLimitations(const std::vector<MachineInstr *> &MIs,
DR600ControlFlowFinalizer.cpp463 void CounterPropagateAddr(const std::set<MachineInstr *> &MIs, in CounterPropagateAddr() argument
465 for (MachineInstr *MI : MIs) { in CounterPropagateAddr()
DR600InstrInfo.cpp622 R600InstrInfo::fitsConstReadLimitations(const std::vector<MachineInstr *> &MIs) in fitsConstReadLimitations()
626 for (unsigned i = 0, n = MIs.size(); i < n; i++) { in fitsConstReadLimitations()
627 MachineInstr *MI = MIs[i]; in fitsConstReadLimitations()
/external/llvm/docs/
DCodeGenerator.rst532 Conceptually a MI bundle is a MI with a number of other MIs nested within:
571 MachineBasicBlock and MachineInstr. All the MIs (including top level and nested
572 ones) are stored as sequential list of MIs. The "bundled" MIs are marked with
574 to represent the start of a bundle. It's legal to mix BUNDLE MIs with indiviual
575 MIs that are not inside bundles nor represent bundles.
578 methods have been taught to correctly handle bundles and MIs inside bundles.
579 The MachineBasicBlock iterator has been modified to skip over bundled MIs to
582 over all of the MIs in a MachineBasicBlock, including those which are nested
585 the bundled MIs.
588 allocation super-pass. More specifically, the pass which determines what MIs
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