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Searched refs:MLOAD (Results 1 – 9 of 9) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h733 MLOAD, MSTORE, enumerator
DSelectionDAGNodes.h1211 N->getOpcode() == ISD::MLOAD ||
2034 return N->getOpcode() == ISD::MLOAD ||
2046 : MaskedLoadStoreSDNode(ISD::MLOAD, Order, dl, Operands, numOperands,
2056 return N->getOpcode() == ISD::MLOAD;
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp293 case ISD::MLOAD: return "masked_load"; in getOperationName()
DLegalizeIntegerTypes.cpp70 case ISD::MLOAD: Res = PromoteIntRes_MLOAD(cast<MaskedLoadSDNode>(N)); in PromoteIntegerResult()
901 case ISD::MLOAD: Res = PromoteIntOp_MLOAD(cast<MaskedLoadSDNode>(N), in PromoteIntegerOperand()
DLegalizeVectorTypes.cpp611 case ISD::MLOAD: in SplitVectorResult()
2019 case ISD::MLOAD: in WidenVectorResult()
DSelectionDAG.cpp5332 AddNodeIDNode(ID, ISD::MLOAD, VTs, Ops); in getMaskedLoad()
DDAGCombiner.cpp1444 case ISD::MLOAD: return visitMLOAD(N); in visit()
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td515 def masked_load : SDNode<"ISD::MLOAD", SDTMaskedLoad,
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp1268 setOperationAction(ISD::MLOAD, VT, Legal); in X86TargetLowering()
1402 setOperationAction(ISD::MLOAD, MVT::v8i32, Custom); in X86TargetLowering()
1403 setOperationAction(ISD::MLOAD, MVT::v8f32, Custom); in X86TargetLowering()
1606 setOperationAction(ISD::MLOAD, VT, Legal); in X86TargetLowering()
1812 setTargetDAGCombine(ISD::MLOAD); in X86TargetLowering()
20147 case ISD::MLOAD: return LowerMLOAD(Op, Subtarget, DAG); in LowerOperation()
27703 case ISD::MLOAD: return PerformMLOADCombine(N, DAG, DCI, Subtarget); in PerformDAGCombine()