Searched refs:MOp (Results 1 – 6 of 6) sorted by relevance
/external/llvm/lib/Target/AMDGPU/ |
D | R600OptimizeVectorRegisters.cpp | 277 for (MachineInstr::mop_iterator MOp = RSI.Instr->operands_begin(), in tryMergeUsingCommonSlot() local 278 MOE = RSI.Instr->operands_end(); MOp != MOE; ++MOp) { in tryMergeUsingCommonSlot() 279 if (!MOp->isReg()) in tryMergeUsingCommonSlot() 281 if (PreviousRegSeqByReg[MOp->getReg()].empty()) in tryMergeUsingCommonSlot() 283 for (MachineInstr *MI : PreviousRegSeqByReg[MOp->getReg()]) { in tryMergeUsingCommonSlot()
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/external/llvm/lib/Target/Mips/ |
D | Mips16ISelDAGToDAG.cpp | 267 unsigned MOp; in selectNode() local 270 MOp = Mips::AdduRxRyRz16; in selectNode() 273 MOp = Mips::SubuRxRyRz16; in selectNode() 289 SDNode *Result = CurDAG->SelectNodeTo(Node, MOp, VT, MVT::Glue, LHS, in selectNode()
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D | MipsSEISelDAGToDAG.h | 40 SDNode *selectAddESubE(unsigned MOp, SDValue InFlag, SDValue CmpLHS,
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D | MipsSEISelDAGToDAG.cpp | 235 SDNode *MipsSEDAGToDAGISel::selectAddESubE(unsigned MOp, SDValue InFlag, in selectAddESubE() argument 274 return CurDAG->SelectNodeTo(Node, MOp, VT, MVT::Glue, LHS, in selectAddESubE()
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/external/llvm/lib/CodeGen/ |
D | PeepholeOptimizer.cpp | 1633 const MachineOperand &MOp = MI->getOperand(i); in runOnMachineFunction() local 1634 if (!MOp.isReg()) in runOnMachineFunction() 1636 unsigned FoldAsLoadDefReg = MOp.getReg(); in runOnMachineFunction()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 21693 unsigned MOp, FOp; in EmitLoweredAtomicFP() local 21696 case X86::RELEASE_FADD32mr: MOp = X86::MOVSSmr; FOp = X86::ADDSSrm; break; in EmitLoweredAtomicFP() 21697 case X86::RELEASE_FADD64mr: MOp = X86::MOVSDmr; FOp = X86::ADDSDrm; break; in EmitLoweredAtomicFP() 21709 MachineInstrBuilder MIM = BuildMI(*BB, MI, DL, TII->get(MOp)) in EmitLoweredAtomicFP()
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