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Searched refs:MinLatency (Results 1 – 11 of 11) sorted by relevance

/external/llvm/lib/Target/Hexagon/
DHexagonMachineScheduler.cpp235 unsigned MinLatency = I->getLatency(); in releaseTopNode() local
237 Top.MaxMinLatency = std::max(MinLatency, Top.MaxMinLatency); in releaseTopNode()
239 if (SU->TopReadyCycle < PredReadyCycle + MinLatency) in releaseTopNode()
240 SU->TopReadyCycle = PredReadyCycle + MinLatency; in releaseTopNode()
254 unsigned MinLatency = I->getLatency(); in releaseBottomNode() local
256 Bot.MaxMinLatency = std::max(MinLatency, Bot.MaxMinLatency); in releaseBottomNode()
258 if (SU->BotReadyCycle < SuccReadyCycle + MinLatency) in releaseBottomNode()
259 SU->BotReadyCycle = SuccReadyCycle + MinLatency; in releaseBottomNode()
/external/llvm/lib/Target/PowerPC/
DPPCScheduleA2.td163 let MinLatency = -1; // OperandCycles are interpreted as MinLatency.
DPPCScheduleE500mc.td314 let MinLatency = -1; // OperandCycles are interpreted as MinLatency.
DPPCScheduleE5500.td374 let MinLatency = -1; // OperandCycles are interpreted as MinLatency.
DPPCScheduleG5.td121 let MinLatency = 0; // Out-of-order dispatch.
DPPCSchedule440.td600 let MinLatency = -1; // OperandCycles are interpreted as MinLatency.
DPPCScheduleP7.td385 let MinLatency = 0; // Out-of-order dispatch.
DPPCScheduleP8.td394 let MinLatency = 0; // Out-of-order dispatch.
/external/llvm/lib/Target/AArch64/
DAArch64SchedA53.td22 let MinLatency = 1 ; // OperandCycles are interpreted as MinLatency.
/external/llvm/lib/Target/ARM/
DARMScheduleA8.td1068 let MinLatency = -1; // OperandCycles are interpreted as MinLatency.
/external/llvm/include/llvm/Target/
DTargetSchedule.td79 int MinLatency = -1; // Determines which instructions are allowed in a group.