Home
last modified time | relevance | path

Searched refs:N00 (Results 1 – 8 of 8) sorted by relevance

/external/clang/test/Modules/Inputs/stress1/
Dcommon.h10 namespace N00 {
31 struct S00 : N00::S00 {};
45 struct S00 : N00::S00 {
46 using N00::S00::S00;
52 using namespace N00;
Dmerge00.h22 inline int g() { return N00::S00('a').method00('b') + (int)S00(42) + function00(42); } in g()
26 inline N00::S01 h() { return N00::S01(); } in h()
Dm01.h8 inline N00::S01 m01_special_members() { return N00::S01(); } in m01_special_members()
/external/clang/test/Modules/
Dstress1.cpp131 int f() { return N01::S00('a').method00('b') + (int)N00::S00(42) + function00(42) + g(); } in f()
/external/llvm/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp1722 SDValue N00 = N0.getOperand(0); in visitADD() local
1727 if (isa<ConstantSDNode>(N00) || isa<ConstantSDNode>(N10)) in visitADD()
1729 DAG.getNode(ISD::ADD, SDLoc(N0), VT, N00, N10), in visitADD()
3371 SDValue N00 = N0->getOperand(0); in MatchBSwapHWordLow() local
3372 if (!LookPassAnd0 && N00.getOpcode() == ISD::AND) { in MatchBSwapHWordLow()
3373 if (!N00.getNode()->hasOneUse()) in MatchBSwapHWordLow()
3375 ConstantSDNode *N001C = dyn_cast<ConstantSDNode>(N00.getOperand(1)); in MatchBSwapHWordLow()
3378 N00 = N00.getOperand(0); in MatchBSwapHWordLow()
3393 if (N00 != N10) in MatchBSwapHWordLow()
3414 SDValue Res = DAG.getNode(ISD::BSWAP, SDLoc(N), VT, N00); in MatchBSwapHWordLow()
[all …]
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp23732 SDValue N00 = N0->getOperand(0); in PerformBITCASTCombine() local
23733 if (N00.getValueType() == MVT::i32) in PerformBITCASTCombine()
23734 return DAG.getNode(X86ISD::MMX_MOVW2D, SDLoc(N00), VT, N00); in PerformBITCASTCombine()
24960 SDValue N00 = N0.getOperand(0); in PerformSHLCombine() local
24976 if (N00.getOpcode() == X86ISD::SETCC_CARRY) { in PerformSHLCombine()
24978 } else if (N00.getOpcode() == ISD::SIGN_EXTEND && in PerformSHLCombine()
24979 N00.getOperand(0).getOpcode() == X86ISD::SETCC_CARRY) { in PerformSHLCombine()
24981 } else if ((N00.getOpcode() == ISD::ZERO_EXTEND || in PerformSHLCombine()
24982 N00.getOpcode() == ISD::ANY_EXTEND) && in PerformSHLCombine()
24983 N00.getOperand(0).getOpcode() == X86ISD::SETCC_CARRY) { in PerformSHLCombine()
[all …]
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp6417 SDValue N00 = SkipExtensionForVMULL(N0->getOperand(0).getNode(), DAG); in LowerMUL() local
6422 DAG.getNode(ISD::BITCAST, DL, Op1VT, N00), Op1), in LowerMUL()
8715 SDValue N00 = N0->getOperand(0); in PerformVMULCombine() local
8718 DAG.getNode(ISD::MUL, DL, VT, N00, N1), in PerformVMULCombine()
8951 SDValue N00 = N0.getOperand(0); in PerformORCombine() local
8974 Res = DAG.getNode(ARMISD::BFI, DL, VT, N00, in PerformORCombine()
9002 Res = DAG.getNode(ARMISD::BFI, DL, VT, N00, Res, in PerformORCombine()
9016 Res = DAG.getNode(ISD::SRL, DL, VT, N00, in PerformORCombine()
9027 N00.getOpcode() == ISD::SHL && isa<ConstantSDNode>(N00.getOperand(1)) && in PerformORCombine()
9031 SDValue ShAmt = N00.getOperand(1); in PerformORCombine()
[all …]
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp2200 SDValue N00 = skipExtensionForVectorMULL(N0->getOperand(0).getNode(), DAG); in LowerMUL() local
2205 DAG.getNode(ISD::BITCAST, DL, Op1VT, N00), Op1), in LowerMUL()
7910 SDValue N00 = N0->getOperand(0); in performConcatVectorsCombine() local
7912 EVT N00VT = N00.getValueType(); in performConcatVectorsCombine()
7924 DAG.getNode(ISD::BITCAST, dl, MidVT, N00), in performConcatVectorsCombine()