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Searched refs:NV50_IR_MOD_NEG (Results 1 – 8 of 8) sorted by relevance

/external/mesa3d/src/gallium/drivers/nv50/codegen/
Dnv50_ir_peephole.cpp324 if (bits & NV50_IR_MOD_NEG) in applyTo()
345 if (bits & NV50_IR_MOD_NEG) in applyTo()
354 if (bits & NV50_IR_MOD_NEG) in applyTo()
378 case NV50_IR_MOD_NEG: return OP_NEG; in getOp()
585 mul1->src(0).mod *= Modifier(NV50_IR_MOD_NEG); in tryCollapseChainedMULs()
609 mul2->src(s2).mod *= Modifier(NV50_IR_MOD_NEG); in tryCollapseChainedMULs()
633 i->src(t).mod = i->src(t).mod ^ Modifier(NV50_IR_MOD_NEG); in opnd()
646 i->src(t).mod = i->src(t).mod ^ Modifier(NV50_IR_MOD_NEG); in opnd()
850 i->src(0).mod = i->src(0).mod ^ Modifier(NV50_IR_MOD_NEG); in visit()
874 mod = mod & Modifier(~(NV50_IR_MOD_NEG | NV50_IR_MOD_ABS)); in visit()
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Dnv50_ir.h340 #define NV50_IR_MOD_NEG (1 << 1) macro
343 #define NV50_IR_MOD_NEG_ABS (NV50_IR_MOD_NEG | NV50_IR_MOD_ABS)
376 inline int neg() const { return (bits & NV50_IR_MOD_NEG) ? 1 : 0; } in neg()
Dnv50_ir.cpp37 case OP_NEG: bits = NV50_IR_MOD_NEG; break; in Modifier()
53 b &= ~NV50_IR_MOD_NEG; in operator *()
55 a = (this->bits ^ b) & (NV50_IR_MOD_NOT | NV50_IR_MOD_NEG); in operator *()
Dnv50_ir_print.cpp313 if (bits & NV50_IR_MOD_NEG) in print()
Dnv50_ir_target_nv50.cpp172 opInfo[prop->op].srcMods[s] |= NV50_IR_MOD_NEG; in initOpInfo()
Dnv50_ir_from_tgsi.cpp294 m = m | nv50_ir::Modifier(NV50_IR_MOD_NEG); in getMod()
1235 if (m & Modifier(NV50_IR_MOD_NEG)) in applySrcMod()
/external/mesa3d/src/gallium/drivers/nvc0/codegen/
Dnv50_ir_target_nvc0.cpp315 opInfo[prop->op].srcMods[s] |= NV50_IR_MOD_NEG; in initOpInfo()
Dnv50_ir_emit_nvc0.cpp1811 if (i->src(s).mod == Modifier(NV50_IR_MOD_NEG)) in getMinEncodingSize()