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Searched refs:NewSU (Results 1 – 2 of 2) sorted by relevance

/external/llvm/lib/CodeGen/SelectionDAG/
DScheduleDAGFast.cpp221 SUnit *NewSU; in CopyAndMoveSuccessors() local
253 SUnit *NewSU = newSUnit(N); in CopyAndMoveSuccessors() local
255 N->setNodeId(NewSU->NodeNum); in CopyAndMoveSuccessors()
260 NewSU->isTwoAddress = true; in CopyAndMoveSuccessors()
265 NewSU->isCommutable = true; in CopyAndMoveSuccessors()
318 AddPred(NewSU, Pred); in CopyAndMoveSuccessors()
325 D.setSUnit(NewSU); in CopyAndMoveSuccessors()
341 AddPred(NewSU, D); in CopyAndMoveSuccessors()
346 if (NewSU->NumSuccsLeft == 0) { in CopyAndMoveSuccessors()
347 NewSU->isAvailable = true; in CopyAndMoveSuccessors()
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DScheduleDAGRRList.cpp954 SUnit *NewSU; in CopyAndMoveSuccessors() local
1007 SUnit *NewSU = CreateNewSUnit(N); in CopyAndMoveSuccessors() local
1009 N->setNodeId(NewSU->NodeNum); in CopyAndMoveSuccessors()
1014 NewSU->isTwoAddress = true; in CopyAndMoveSuccessors()
1019 NewSU->isCommutable = true; in CopyAndMoveSuccessors()
1021 InitNumRegDefsLeft(NewSU); in CopyAndMoveSuccessors()
1022 computeLatency(NewSU); in CopyAndMoveSuccessors()
1063 AddPred(NewSU, Pred); in CopyAndMoveSuccessors()
1070 D.setSUnit(NewSU); in CopyAndMoveSuccessors()
1074 && !D.isCtrl() && NewSU->NumRegDefsLeft > 0) in CopyAndMoveSuccessors()
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