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Searched refs:NewSrc (Results 1 – 4 of 4) sorted by relevance

/external/llvm/lib/CodeGen/
DPeepholeOptimizer.cpp935 TargetInstrInfo::RegSubRegPair NewSrc = in RewriteSource() local
945 .addReg(NewSrc.Reg, 0, NewSrc.SubReg); in RewriteSource()
959 MRI.clearKillFlags(NewSrc.Reg); in RewriteSource()
1214 TargetInstrInfo::RegSubRegPair NewSrc = CpyRewriter->getNewSource( in optimizeCoalescableCopy() local
1216 if (SrcReg == NewSrc.Reg || NewSrc.Reg == 0) in optimizeCoalescableCopy()
1220 if (CpyRewriter->RewriteCurrentSource(NewSrc.Reg, NewSrc.SubReg)) { in optimizeCoalescableCopy()
1222 MRI->clearKillFlags(NewSrc.Reg); in optimizeCoalescableCopy()
/external/llvm/lib/Target/X86/
DX86InstrInfo.h233 unsigned &NewSrc, bool &isKill,
DX86InstrInfo.cpp2541 unsigned &NewSrc, bool &isKill, bool &isUndef, in classifyLEAReg() argument
2556 NewSrc = SrcReg; in classifyLEAReg()
2560 if (TargetRegisterInfo::isVirtualRegister(NewSrc) && in classifyLEAReg()
2561 !MF.getRegInfo().constrainRegClass(NewSrc, RC)) in classifyLEAReg()
2573 NewSrc = getX86SubSuperRegister(Src.getReg(), MVT::i64); in classifyLEAReg()
2575 MI->getParent()->computeRegisterLiveness(&getRegisterInfo(), NewSrc, MI); in classifyLEAReg()
2595 NewSrc = MF.getRegInfo().createVirtualRegister(RC); in classifyLEAReg()
2598 .addReg(NewSrc, RegState::Define | RegState::Undef, X86::sub_32bit) in classifyLEAReg()
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorTypes.cpp1249 SDValue NewSrc = in SplitVecRes_ExtendOp() local
1252 std::tie(Lo, Hi) = DAG.SplitVector(NewSrc, dl); in SplitVecRes_ExtendOp()