| /external/llvm/lib/Target/Sparc/ |
| D | SparcTargetMachine.cpp | 61 CodeGenOpt::Level OL, bool is64bit) in SparcTargetMachine() argument
63 RM, CM, OL), in SparcTargetMachine()
113 CodeGenOpt::Level OL) in SparcV8TargetMachine() argument
114 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} in SparcV8TargetMachine()
122 CodeGenOpt::Level OL) in SparcV9TargetMachine() argument
123 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {} in SparcV9TargetMachine()
131 CodeGenOpt::Level OL) in SparcelTargetMachine() argument
132 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} in SparcelTargetMachine()
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| D | SparcTargetMachine.h | 29 Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL,
52 CodeGenOpt::Level OL);
63 CodeGenOpt::Level OL);
73 CodeGenOpt::Level OL);
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| /external/llvm/lib/Target/ARM/ |
| D | ARMTargetMachine.h | 43 CodeGenOpt::Level OL, bool isLittle);
68 CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle);
79 CodeGenOpt::Level OL);
90 CodeGenOpt::Level OL);
102 Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL,
114 CodeGenOpt::Level OL);
125 CodeGenOpt::Level OL);
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| D | ARMTargetMachine.cpp | 180 CodeGenOpt::Level OL, bool isLittle) in ARMBaseTargetMachine() argument
182 CPU, FS, Options, RM, CM, OL), in ARMBaseTargetMachine()
252 CodeGenOpt::Level OL, bool isLittle) in ARMTargetMachine() argument
253 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, isLittle) { in ARMTargetMachine()
266 CodeGenOpt::Level OL) in ARMLETargetMachine() argument
267 : ARMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {} in ARMLETargetMachine()
275 CodeGenOpt::Level OL) in ARMBETargetMachine() argument
276 : ARMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} in ARMBETargetMachine()
284 CodeGenOpt::Level OL, bool isLittle) in ThumbTargetMachine() argument
285 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, isLittle) { in ThumbTargetMachine()
[all …]
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| /external/llvm/lib/CodeGen/ |
| D | ParallelCG.cpp | 31 CodeModel::Model CM, CodeGenOpt::Level OL, in codegen() argument
34 M->getTargetTriple(), CPU, Features, Options, RM, CM, OL)); in codegen()
46 Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, in splitCodeGen() argument
56 OL, FileType); in splitCodeGen()
73 [TheTarget, CPU, Features, Options, RM, CM, OL, FileType, in splitCodeGen()
85 Options, RM, CM, OL, FileType); in splitCodeGen()
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| D | LiveDebugValues.cpp | 243 auto OL = OutLocs.find(CurMBB); in transferTerminatorInst() local
244 assert(OL != OutLocs.end()); in transferTerminatorInst()
245 VarLocList &VLL = OL->second; in transferTerminatorInst()
284 auto OL = OutLocs.find(p); in join() local
286 if (OL == OutLocs.end()) in join()
291 InLocsT = OL->second; in join()
296 VarLocList &VLL = OL->second; in join()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCTargetMachine.cpp | 113 static std::string computeFSAdditions(StringRef FS, CodeGenOpt::Level OL, in computeFSAdditions() argument
125 if (OL >= CodeGenOpt::Default) { in computeFSAdditions()
132 if (OL != CodeGenOpt::None) { in computeFSAdditions()
183 CodeGenOpt::Level OL) in PPCTargetMachine() argument
185 computeFSAdditions(FS, OL, TT), Options, RM, CM, OL), in PPCTargetMachine()
188 Subtarget(TargetTriple, CPU, computeFSAdditions(FS, OL, TT), *this) { in PPCTargetMachine()
218 CodeGenOpt::Level OL) in PPC32TargetMachine() argument
219 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {} in PPC32TargetMachine()
227 CodeGenOpt::Level OL) in PPC64TargetMachine() argument
228 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {} in PPC64TargetMachine()
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| D | PPCTargetMachine.h | 39 CodeModel::Model CM, CodeGenOpt::Level OL);
68 CodeGenOpt::Level OL);
79 CodeGenOpt::Level OL);
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXTargetMachine.cpp | 94 CodeGenOpt::Level OL, bool is64bit) in NVPTXTargetMachine() argument
96 CM, OL), in NVPTXTargetMachine()
114 CodeGenOpt::Level OL) in NVPTXTargetMachine32() argument
115 : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} in NVPTXTargetMachine32()
123 CodeGenOpt::Level OL) in NVPTXTargetMachine64() argument
124 : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {} in NVPTXTargetMachine64()
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| D | NVPTXTargetMachine.h | 74 CodeGenOpt::Level OL);
83 CodeGenOpt::Level OL);
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| /external/llvm/lib/Target/Mips/ |
| D | MipsTargetMachine.cpp | 89 CodeGenOpt::Level OL, bool isLittle) in MipsTargetMachine() argument
91 CPU, FS, Options, RM, CM, OL), in MipsTargetMachine()
111 CodeGenOpt::Level OL) in MipsebTargetMachine() argument
112 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} in MipsebTargetMachine()
120 CodeGenOpt::Level OL) in MipselTargetMachine() argument
121 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {} in MipselTargetMachine()
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| D | MipsTargetMachine.h | 44 CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle);
79 CodeGenOpt::Level OL);
90 CodeGenOpt::Level OL);
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| /external/llvm/lib/Target/ |
| D | TargetMachineC.cpp | 135 CodeGenOpt::Level OL; in LLVMCreateTargetMachine() local
138 OL = CodeGenOpt::None; in LLVMCreateTargetMachine()
141 OL = CodeGenOpt::Less; in LLVMCreateTargetMachine()
144 OL = CodeGenOpt::Aggressive; in LLVMCreateTargetMachine()
147 OL = CodeGenOpt::Default; in LLVMCreateTargetMachine()
153 CM, OL)); in LLVMCreateTargetMachine()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64TargetMachine.h | 33 CodeGenOpt::Level OL, bool IsLittleEndian);
60 CodeGenOpt::Level OL);
71 CodeGenOpt::Level OL);
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| D | AArch64TargetMachine.cpp | 127 CodeGenOpt::Level OL, in AArch64TargetMachine() argument
132 Options, RM, CM, OL), in AArch64TargetMachine()
169 CodeGenOpt::Level OL) in AArch64leTargetMachine() argument
170 : AArch64TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {} in AArch64leTargetMachine()
177 CodeGenOpt::Level OL) in AArch64beTargetMachine() argument
178 : AArch64TargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} in AArch64beTargetMachine()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUTargetMachine.h | 42 CodeModel::Model CM, CodeGenOpt::Level OL);
68 CodeModel::Model CM, CodeGenOpt::Level OL);
82 CodeModel::Model CM, CodeGenOpt::Level OL);
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| D | AMDGPUTargetMachine.cpp | 108 CodeModel::Model CM, CodeGenOpt::Level OL) in R600TargetMachine() argument
109 : AMDGPUTargetMachine(T, TT, FS, CPU, Options, RM, CM, OL) {} in R600TargetMachine()
118 CodeModel::Model CM, CodeGenOpt::Level OL) in GCNTargetMachine() argument
119 : AMDGPUTargetMachine(T, TT, FS, CPU, Options, RM, CM, OL) {} in GCNTargetMachine()
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| /external/llvm/lib/Target/Sparc/MCTargetDesc/ |
| D | SparcMCTargetDesc.cpp | 87 CodeGenOpt::Level OL) { in createSparcMCCodeGenInfo() argument
98 X->initMCCodeGenInfo(RM, CM, OL); in createSparcMCCodeGenInfo()
105 CodeGenOpt::Level OL) { in createSparcV9MCCodeGenInfo() argument
120 X->initMCCodeGenInfo(RM, CM, OL); in createSparcV9MCCodeGenInfo()
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| /external/llvm/lib/MC/ |
| D | MCCodeGenInfo.cpp | 19 CodeGenOpt::Level OL) { in initMCCodeGenInfo() argument
22 OptLevel = OL; in initMCCodeGenInfo()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430TargetMachine.cpp | 32 CodeGenOpt::Level OL) in MSP430TargetMachine() argument
34 Options, RM, CM, OL), in MSP430TargetMachine()
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| /external/llvm/lib/Target/BPF/ |
| D | BPFTargetMachine.cpp | 43 CodeGenOpt::Level OL) in BPFTargetMachine() argument
45 OL), in BPFTargetMachine()
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| /external/llvm/lib/Target/MSP430/MCTargetDesc/ |
| D | MSP430MCTargetDesc.cpp | 54 CodeGenOpt::Level OL) { in createMSP430MCCodeGenInfo() argument
56 X->initMCCodeGenInfo(RM, CM, OL); in createMSP430MCCodeGenInfo()
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| /external/llvm/lib/Target/NVPTX/MCTargetDesc/ |
| D | NVPTXMCTargetDesc.cpp | 55 CodeGenOpt::Level OL) { in createNVPTXMCCodeGenInfo() argument
60 X->initMCCodeGenInfo(Reloc::Default, CM, OL); in createNVPTXMCCodeGenInfo()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreTargetMachine.cpp | 29 CodeGenOpt::Level OL) in XCoreTargetMachine() argument
32 TT, CPU, FS, Options, RM, CM, OL), in XCoreTargetMachine()
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| /external/llvm/include/llvm/Support/ |
| D | TargetRegistry.h | 98 CodeGenOpt::Level OL);
108 CodeGenOpt::Level OL);
307 CodeGenOpt::Level OL) const { in createMCCodeGenInfo() argument
310 return MCCodeGenInfoCtorFn(Triple(TT), RM, CM, OL); in createMCCodeGenInfo()
365 CodeGenOpt::Level OL = CodeGenOpt::Default) const {
369 CM, OL);
1101 CodeModel::Model CM, CodeGenOpt::Level OL) { in Allocator()
1102 return new TargetMachineImpl(T, TT, CPU, FS, Options, RM, CM, OL); in Allocator()
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