Searched refs:OP3 (Results 1 – 7 of 7) sorted by relevance
/external/llvm/test/CodeGen/AArch64/ |
D | fp16-v4-instructions.ll | 137 ; CHECK-NEXT: sshll [[OP3:v[0-9]+\.4s]], [[OP2]], #0 138 ; CHECK-NEXT: scvtf [[OP4:v[0-9]+\.4s]], [[OP3]] 170 ; CHECK-DAG: fcvtn [[OP3:v[0-9]+]].2s, [[OP1]] 171 ; CHECK-NEXT: fcvtn2 [[OP3]].4s, [[OP2]] 172 ; CHECK-NEXT: fcvtn v0.4h, [[OP3]].4s 213 ; CHECK-DAG: fcvtn [[OP3:v[0-9]+]].2s, [[OP1]] 214 ; CHECK-NEXT: fcvtn2 [[OP3]].4s, [[OP2]] 215 ; CHECK-NEXT: fcvtn v0.4h, [[OP3]].4s
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D | fp16-v8-instructions.ll | 302 ; CHECK-DAG: fcvtn [[OP3:v[0-9]+]].2s, [[OP1]] 303 ; CHECK-DAG: fcvtn2 [[OP3]].4s, [[OP2]] 304 ; CHECK: fcvtn v0.4h, [[OP3]].4s 354 ; CHECK-DAG: fcvtn [[OP3:v[0-9]+]].2s, [[OP1]] 355 ; CHECK-DAG: fcvtn2 [[OP3]].4s, [[OP2]] 356 ; CHECK: fcvtn v0.4h, [[OP3]].4s
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/external/llvm/lib/Target/AMDGPU/ |
D | R600Defines.h | 37 OP3 = (1 << 5), enumerator
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D | R600InstrInfo.cpp | 142 (TargetFlags & R600_InstFlag::OP3)); in hasInstrModifiers() 1351 bool IsOP3 = (TargetFlags & R600_InstFlag::OP3) == R600_InstFlag::OP3; in getFlagOp()
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/external/mesa3d/src/gallium/drivers/radeon/ |
D | R600InstrInfo.h | 139 OP3 = (1 << 5), enumerator
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/external/mesa3d/src/gallium/state_trackers/d3d1x/gd3d1x/ |
D | sm4_to_tgsi.cpp | 241 #define OP3(n) OP3_(n, n) macro 263 OP3(MAD); in translate_insns() 511 OP3(UMAD); in translate_insns()
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/external/boringssl/src/decrepit/cast/ |
D | cast.c | 90 #define E_CAST(n, key, L, R, OP1, OP2, OP3) \ argument 99 L ^= (((((a OP2 b)&0xffffffffL)OP3 c) & 0xffffffffL)OP1 d) & 0xffffffffL; \
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