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Searched refs:Offset0 (Results 1 – 6 of 6) sorted by relevance

/external/llvm/lib/Target/AMDGPU/
DSILoadStoreOptimizer.cpp65 static bool offsetsCanBeCombined(unsigned Offset0,
134 bool SILoadStoreOptimizer::offsetsCanBeCombined(unsigned Offset0, in offsetsCanBeCombined() argument
139 if (Offset0 == Offset1) in offsetsCanBeCombined()
143 if ((Offset0 % Size != 0) || (Offset1 % Size != 0)) in offsetsCanBeCombined()
146 unsigned EltOffset0 = Offset0 / Size; in offsetsCanBeCombined()
185 unsigned Offset0 = I->getOperand(OffsetIdx).getImm() & 0xffff; in findMatchingDSInst() local
189 if (offsetsCanBeCombined(Offset0, Offset1, EltSize)) in findMatchingDSInst()
220 unsigned Offset0 in mergeRead2Pair() local
225 unsigned NewOffset0 = Offset0 / EltSize; in mergeRead2Pair()
316 unsigned Offset0 in mergeWrite2Pair() local
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DAMDGPUInstrInfo.cpp206 int64_t Offset0, int64_t Offset1, in shouldScheduleLoadsNear() argument
208 assert(Offset1 > Offset0 && in shouldScheduleLoadsNear()
214 return (NumLoads <= 16 && (Offset1 - Offset0) < 64); in shouldScheduleLoadsNear()
DSIInstrInfo.cpp93 int64_t &Offset0, in areLoadsFromSameBasePtr() argument
126 Offset0 = cast<ConstantSDNode>(Load0->getOperand(2))->getZExtValue(); in areLoadsFromSameBasePtr()
150 Offset0 = Load0Offset->getZExtValue(); in areLoadsFromSameBasePtr()
184 Offset0 = cast<ConstantSDNode>(Off0)->getZExtValue(); in areLoadsFromSameBasePtr()
230 uint8_t Offset0 = Offset0Imm->getImm(); in getMemOpBaseRegImmOfs() local
233 if (Offset1 > Offset0 && Offset1 - Offset0 == 1) { in getMemOpBaseRegImmOfs()
252 Offset = EltSize * Offset0; in getMemOpBaseRegImmOfs()
1182 unsigned BaseReg0, Offset0; in checkInstOffsetsDoNotOverlap() local
1185 if (getMemOpBaseRegImmOfs(MIa, BaseReg0, Offset0, &RI) && in checkInstOffsetsDoNotOverlap()
1192 offsetsDoNotOverlap(Width0, Offset0, Width1, Offset1)) { in checkInstOffsetsDoNotOverlap()
DAMDGPUISelDAGToDAG.cpp96 bool SelectDS64Bit4ByteAligned(SDValue Ptr, SDValue &Base, SDValue &Offset0,
850 SDValue &Offset0, in SelectDS64Bit4ByteAligned() argument
863 Offset0 = CurDAG->getTargetConstant(DWordOffset0, DL, MVT::i8); in SelectDS64Bit4ByteAligned()
889 Offset0 = CurDAG->getTargetConstant(DWordOffset0, DL, MVT::i8); in SelectDS64Bit4ByteAligned()
906 Offset0 = CurDAG->getTargetConstant(DWordOffset0, DL, MVT::i8); in SelectDS64Bit4ByteAligned()
914 Offset0 = CurDAG->getTargetConstant(0, DL, MVT::i8); in SelectDS64Bit4ByteAligned()
/external/llvm/test/CodeGen/SPARC/
D64abi.ll432 ; CHECK-DAG: std %f4, [%sp+[[Offset0:[0-9]+]]]
434 ; CHECK-DAG: ldx [%sp+[[Offset0]]], %o2
444 ; CHECK: st %f1, [%fp+[[Offset0:[0-9]+]]]
448 ; CHECK: ld [%fp+[[Offset0]]], %f1
/external/llvm/lib/CodeGen/SelectionDAG/
DDAGCombiner.cpp9729 APInt Offset0 = CN->getAPIntValue(); in CombineToPreIndexedLoadStore() local
9739 APInt CNV = Offset0; in CombineToPreIndexedLoadStore()