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Searched refs:OpCode (Results 1 – 24 of 24) sorted by relevance

/external/nanohttpd/websocket/src/main/java/fi/iki/elonen/
DNanoWSD.java53 import fi.iki.elonen.NanoWSD.WebSocketFrame.OpCode;
71 private WebSocketFrame.OpCode continuousOpCode = null;
191 if (frame.getOpCode() != OpCode.Continuation) { in handleFrameFragment()
218 if (frame.getOpCode() == OpCode.Close) { in handleWebsocketFrame()
220 } else if (frame.getOpCode() == OpCode.Ping) { in handleWebsocketFrame()
221 sendFrame(new WebSocketFrame(OpCode.Pong, true, frame.getBinaryPayload())); in handleWebsocketFrame()
222 } else if (frame.getOpCode() == OpCode.Pong) { in handleWebsocketFrame()
224 } else if (!frame.isFin() || frame.getOpCode() == OpCode.Continuation) { in handleWebsocketFrame()
228 } else if (frame.getOpCode() == OpCode.Text || frame.getOpCode() == OpCode.Binary) { in handleWebsocketFrame()
238 sendFrame(new WebSocketFrame(OpCode.Ping, true, payload)); in ping()
[all …]
/external/llvm/include/llvm/IR/
DInstruction.h114 static const char* getOpcodeName(unsigned OpCode);
116 static inline bool isTerminator(unsigned OpCode) {
117 return OpCode >= TermOpsBegin && OpCode < TermOpsEnd;
141 static inline bool isCast(unsigned OpCode) {
142 return OpCode >= CastOpsBegin && OpCode < CastOpsEnd;
146 static inline bool isFuncletPad(unsigned OpCode) {
147 return OpCode >= FuncletPadOpsBegin && OpCode < FuncletPadOpsEnd;
/external/llvm/bindings/python/llvm/tests/
Dtest_core.py7 from ..core import OpCode
117 inst_list = [('arg1', OpCode.ExtractValue),
118 ('arg2', OpCode.ExtractValue),
119 ('', OpCode.Call),
120 ('', OpCode.Ret)]
Dtest_bitreader.py2 from ..core import OpCode
/external/llvm/lib/Target/XCore/
DXCoreLowerThreadLocal.cpp80 unsigned OpCode = CE->getOpcode(); in createReplacementInstr() local
81 switch (OpCode) { in createReplacementInstr()
105 Builder.CreateBinOp((Instruction::BinaryOps)OpCode, in createReplacementInstr()
121 Builder.CreateCast((Instruction::CastOps)OpCode, in createReplacementInstr()
DXCoreRegisterInfo.cpp169 unsigned OpCode = MI.getOpcode(); in InsertSPConstInst() local
172 if (OpCode==XCore::STWFI) { in InsertSPConstInst()
182 switch (OpCode) { in InsertSPConstInst()
/external/llvm/bindings/python/llvm/
Dbit_reader.py8 from .core import OpCode
Dcore.py82 class OpCode(LLVMEnumeration): class
88 super(OpCode, self).__init__(name, value)
417 return OpCode.from_value(lib.LLVMGetInstructionOpcode(self))
594 (OpCode, enumerations.OpCodes),
/external/llvm/lib/Transforms/Scalar/
DIndVarSimplify.cpp906 unsigned OpCode) const;
1088 unsigned OpCode) const { in getSCEVByOpCode()
1089 if (OpCode == Instruction::Add) in getSCEVByOpCode()
1091 if (OpCode == Instruction::Sub) in getSCEVByOpCode()
1093 if (OpCode == Instruction::Mul) in getSCEVByOpCode()
1106 const unsigned OpCode = DU.NarrowUse->getOpcode(); in getExtendedOperandRecurrence() local
1108 if (OpCode != Instruction::Add && OpCode != Instruction::Sub && in getExtendedOperandRecurrence()
1109 OpCode != Instruction::Mul) in getExtendedOperandRecurrence()
1143 dyn_cast<SCEVAddRecExpr>(getSCEVByOpCode(lhs, rhs, OpCode)); in getExtendedOperandRecurrence()
/external/llvm/lib/CodeGen/MIRParser/
DMIParser.cpp186 bool parseInstrName(StringRef InstrName, unsigned &OpCode);
188 bool parseInstruction(unsigned &OpCode, unsigned &Flags);
586 unsigned OpCode, Flags = 0; in parse() local
587 if (Token.isError() || parseInstruction(OpCode, Flags)) in parse()
635 const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode); in parse()
769 bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) { in parseInstruction() argument
777 if (parseInstrName(InstrName, OpCode)) in parseInstruction()
1750 bool MIParser::parseInstrName(StringRef InstrName, unsigned &OpCode) { in parseInstrName() argument
1755 OpCode = InstrInfo->getValue(); in parseInstrName()
/external/pdfium/core/src/fpdfapi/fpdf_page/
Dpageint.h153 struct OpCode { struct
157 static const OpCode g_OpCodes[]; argument
Dfpdf_page_parser.cpp297 const CPDF_StreamContentParser::OpCode CPDF_StreamContentParser::g_OpCodes[] = {
418 int low = 0, high = sizeof g_OpCodes / sizeof(OpCode) - 1; in OnOperator()
/external/llvm/lib/IR/
DInstruction.cpp195 const char *Instruction::getOpcodeName(unsigned OpCode) { in getOpcodeName() argument
196 switch (OpCode) { in getOpcodeName()
/external/llvm/lib/Target/SystemZ/
DSystemZISelDAGToDAG.cpp946 unsigned OpCode = (RISBG.Mask == 0xff ? SystemZ::LLGCR : SystemZ::LLGHR); in tryRISBGZero() local
949 OpCode = (RISBG.Mask == 0xff ? SystemZ::LLCRMux : SystemZ::LLHRMux); in tryRISBGZero()
951 OpCode = (RISBG.Mask == 0xff ? SystemZ::LLCR : SystemZ::LLHR); in tryRISBGZero()
955 N = CurDAG->getMachineNode(OpCode, DL, VT, In); in tryRISBGZero()
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGBuilder.h773 void visitBinary(const User &I, unsigned OpCode);
DSelectionDAGBuilder.cpp2301 void SelectionDAGBuilder::visitBinary(const User &I, unsigned OpCode) { in visitBinary() argument
2332 SDValue BinNodeValue = DAG.getNode(OpCode, getCurSDLoc(), Op1.getValueType(), in visitBinary()
2448 ISD::NodeType OpCode = Cond.getValueType().isVector() ? in visitSelect() local
2522 OpCode = Opc; in visitSelect()
2533 Values[i] = DAG.getNode(OpCode, getCurSDLoc(), in visitSelect()
/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.cpp746 unsigned OpCode = Is64Bit ? PPC::ISEL8 : PPC::ISEL; in insertSelect() local
782 BuildMI(MBB, MI, dl, get(OpCode), DestReg) in insertSelect()
/external/llvm/lib/Target/Mips/AsmParser/
DMipsAsmParser.cpp2518 unsigned OpCode = 0; in expandBranchImm() local
2521 OpCode = Mips::BNE; in expandBranchImm()
2524 OpCode = Mips::BEQ; in expandBranchImm()
2533 emitRRX(OpCode, DstRegOp.getReg(), Mips::ZERO, MemOffsetOp, IDLoc, in expandBranchImm()
2546 emitRRX(OpCode, DstRegOp.getReg(), ATReg, MemOffsetOp, IDLoc, Instructions); in expandBranchImm()
/external/mesa3d/src/mesa/main/
Ddlist.c493 } OpCode; typedef
510 OpCode opcode;
595 is_ext_opcode(OpCode opcode) in is_ext_opcode()
651 const OpCode opcode = n[0].opcode; in _mesa_delete_list()
977 dlist_alloc(struct gl_context *ctx, OpCode opcode, GLuint bytes) in dlist_alloc()
1030 Node *n = dlist_alloc(ctx, (OpCode) opcode, bytes); in _mesa_dlist_alloc()
1078 alloc_instruction(struct gl_context *ctx, OpCode opcode, GLuint nparams) in alloc_instruction()
7692 const OpCode opcode = n[0].opcode; in execute_list()
10703 const OpCode opcode = n[0].opcode; in print_list()
/external/guice/extensions/persist/lib/
Doro-2.0.8.jarMETA-INF/ META-INF/MANIFEST.MF org/ org/apache/ org/ ...
/external/llvm/lib/Transforms/InstCombine/
DInstructionCombining.cpp406 static Value *getIdentityValue(Instruction::BinaryOps OpCode, Value *V) { in getIdentityValue() argument
410 if (OpCode == Instruction::Mul) in getIdentityValue()
/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp858 int OpCode = doesNotReturn ? HexagonISD::CALLv3nr : HexagonISD::CALLv3; in LowerCall() local
859 Chain = DAG.getNode(OpCode, dl, NodeTys, Ops); in LowerCall()
/external/llvm/lib/Analysis/
DScalarEvolution.cpp5724 Instruction::BinaryOps OpCode; in computeShiftCompareExitLimit() local
5725 if (!MatchShiftRecurrence(LHS, PN, OpCode)) in computeShiftCompareExitLimit()
5738 switch (OpCode) { in computeShiftCompareExitLimit()
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp7452 unsigned OpCode = Left ? (ByteShift ? X86ISD::VSHLDQ : X86ISD::VSHLI) in lowerVectorShuffleAsShift() local
7467 V = DAG.getNode(OpCode, DL, ShiftVT, V, in lowerVectorShuffleAsShift()
17552 unsigned OpCode = ((MOV64ri | N86R11) << 8) | REX_WB; // movabsq r11 in LowerINIT_TRAMPOLINE() local
17554 OutChains[0] = DAG.getStore(Root, dl, DAG.getConstant(OpCode, dl, MVT::i16), in LowerINIT_TRAMPOLINE()
17566 OpCode = ((MOV64ri | N86R10) << 8) | REX_WB; // movabsq r10 in LowerINIT_TRAMPOLINE()
17569 OutChains[2] = DAG.getStore(Root, dl, DAG.getConstant(OpCode, dl, MVT::i16), in LowerINIT_TRAMPOLINE()
17580 OpCode = (JMP64r << 8) | REX_WB; // jmpq *... in LowerINIT_TRAMPOLINE()
17583 OutChains[4] = DAG.getStore(Root, dl, DAG.getConstant(OpCode, dl, MVT::i16), in LowerINIT_TRAMPOLINE()
19536 auto GetShift = [&](unsigned OpCode, SDValue V, int Shifter) { in LowerVectorCTPOPBitmath() argument
19541 return DAG.getNode(OpCode, DL, VT, V, in LowerVectorCTPOPBitmath()