Searched refs:OrigVT (Results 1 – 7 of 7) sorted by relevance
| /external/llvm/include/llvm/Target/ |
| D | TargetLowering.h | 1385 void AddPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) { in AddPromotedToType() argument
1386 PromoteToType[std::make_pair(Opc, OrigVT.SimpleTy)] = DestVT.SimpleTy; in AddPromotedToType()
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 4104 EVT OrigVT = Op.getOperand(0).getValueType(); in IsMulWideOperandDemotable() local
4105 if (OrigVT.getSizeInBits() <= OptSize) { in IsMulWideOperandDemotable()
4110 EVT OrigVT = Op.getOperand(0).getValueType(); in IsMulWideOperandDemotable() local
4111 if (OrigVT.getSizeInBits() <= OptSize) { in IsMulWideOperandDemotable()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 2656 static unsigned CalculateStackSlotAlignment(EVT ArgVT, EVT OrigVT, in CalculateStackSlotAlignment() argument
2689 if (Flags.isSplit() && OrigVT != MVT::ppcf128) in CalculateStackSlotAlignment()
2690 Align = OrigVT.getStoreSize(); in CalculateStackSlotAlignment()
2702 static bool CalculateStackSlotUsed(EVT ArgVT, EVT OrigVT, in CalculateStackSlotUsed() argument
2714 CalculateStackSlotAlignment(ArgVT, OrigVT, Flags, PtrByteSize); in CalculateStackSlotUsed()
3116 EVT OrigVT = Ins[ArgNo].ArgVT; in LowerFormalArguments_64SVR4() local
3130 Align = CalculateStackSlotAlignment(ObjectVT, OrigVT, Flags, PtrByteSize); in LowerFormalArguments_64SVR4()
4812 EVT OrigVT = Outs[i].ArgVT; in LowerCall_64SVR4() local
4861 CalculateStackSlotAlignment(ArgVT, OrigVT, Flags, PtrByteSize); in LowerCall_64SVR4()
4924 EVT OrigVT = Outs[i].ArgVT; in LowerCall_64SVR4() local
[all …]
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 265 EVT OrigVT = VT; in ExpandConstantFP() local
272 TLI.isLoadExtLegal(ISD::EXTLOAD, OrigVT, SVT) && in ExpandConstantFP()
273 TLI.ShouldShrinkFPConstant(OrigVT)) { in ExpandConstantFP()
286 ISD::EXTLOAD, dl, OrigVT, DAG.getEntryNode(), CPIdx, in ExpandConstantFP()
292 DAG.getLoad(OrigVT, dl, DAG.getEntryNode(), CPIdx, in ExpandConstantFP()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 2018 static EVT getExtensionTo64Bits(const EVT &OrigVT) { in getExtensionTo64Bits() argument
2019 if (OrigVT.getSizeInBits() >= 64) in getExtensionTo64Bits()
2020 return OrigVT; in getExtensionTo64Bits()
2022 assert(OrigVT.isSimple() && "Expecting a simple value type"); in getExtensionTo64Bits()
2024 MVT::SimpleValueType OrigSimpleTy = OrigVT.getSimpleVT().SimpleTy; in getExtensionTo64Bits()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 6224 static EVT getExtensionTo64Bits(const EVT &OrigVT) { in getExtensionTo64Bits() argument
6225 if (OrigVT.getSizeInBits() >= 64) in getExtensionTo64Bits()
6226 return OrigVT; in getExtensionTo64Bits()
6228 assert(OrigVT.isSimple() && "Expecting a simple value type"); in getExtensionTo64Bits()
6230 MVT::SimpleValueType OrigSimpleTy = OrigVT.getSimpleVT().SimpleTy; in getExtensionTo64Bits()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 9982 MVT OrigVT = V.getSimpleValueType(); in splitAndLowerVectorShuffle() local
9983 int OrigNumElements = OrigVT.getVectorNumElements(); in splitAndLowerVectorShuffle()
9985 MVT OrigScalarVT = OrigVT.getVectorElementType(); in splitAndLowerVectorShuffle()
27662 MVT OrigVT = OrigV.getSimpleValueType(); in performVZEXTCombine() local
27664 if (OrigVT.getSizeInBits() > OpVT.getSizeInBits()) { in performVZEXTCombine()
27665 int Ratio = OrigVT.getSizeInBits() / OpVT.getSizeInBits(); in performVZEXTCombine()
27666 OrigVT = MVT::getVectorVT(OrigVT.getVectorElementType(), in performVZEXTCombine()
27667 OrigVT.getVectorNumElements() / Ratio); in performVZEXTCombine()
27668 OrigV = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, OrigVT, OrigV, in performVZEXTCombine()
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