| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 109 def SDTOther : SDTypeProfile<1, 0, [SDTCisVT<0, OtherVT>]>; // for 'vt'.
157 SDTCisSameAs<0, 1>, SDTCisInt<0>, SDTCisVT<2, OtherVT>,
162 SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT>
175 SDTCisVT<5, OtherVT>
179 SDTCisVT<0, OtherVT>
183 SDTCisVT<0, OtherVT>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT>
187 SDTCisInt<0>, SDTCisVT<1, OtherVT>
195 SDTCisVT<0, OtherVT>, SDTCisVT<1, OtherVT>
273 SDTCisVT<2, OtherVT>, SDTCisVT<3, OtherVT>, SDTCisPtrTy<4>, SDTCisPtrTy<5>
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDILInstrInfo.td | 73 def brtarget : Operand<OtherVT>;
97 SDTCisVT<0, OtherVT>
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZOperands.td | 452 def brtarget16 : PCRelOperand<OtherVT, PCRel16> {
456 def brtarget32 : PCRelOperand<OtherVT, PCRel32> {
464 def brtarget16tls : PCRelTLSOperand<OtherVT, PCRelTLS16> {
469 def brtarget32tls : PCRelTLSOperand<OtherVT, PCRelTLS32> {
|
| D | SystemZOperators.td | 24 SDTCisVT<2, OtherVT>]>;
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrInfo.td | 69 def bb_op : Operand<OtherVT>;
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ValueTypes.td | 22 def OtherVT: ValueType<0 , 0>; // "Other" value
|
| /external/llvm/utils/TableGen/ |
| D | CodeGenDAGPatterns.cpp | 399 [Smallest](MVT OtherVT) { in EnforceSmallerThan() argument
401 if (OtherVT.isVector() != Smallest.isVector()) in EnforceSmallerThan()
405 return OtherVT.getScalarSizeInBits() <= Smallest.getScalarSizeInBits()|| in EnforceSmallerThan()
406 OtherVT.getSizeInBits() < Smallest.getSizeInBits(); in EnforceSmallerThan()
432 [Largest](MVT OtherVT) { in EnforceSmallerThan() argument
434 if (OtherVT.isVector() != Largest.isVector()) in EnforceSmallerThan()
436 return OtherVT.getScalarSizeInBits() >= Largest.getScalarSizeInBits() || in EnforceSmallerThan()
437 OtherVT.getSizeInBits() > Largest.getSizeInBits(); in EnforceSmallerThan()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstrInfo.td | 231 SDTCisVT<0, OtherVT>
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| D | AMDGPUInstructions.td | 63 def brtarget : Operand<OtherVT>;
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| /external/llvm/lib/Target/Mips/ |
| D | MicroMipsInstrInfo.td | 144 def jmptarget_mm : Operand<OtherVT> {
152 def brtarget7_mm : Operand<OtherVT> {
159 def brtarget10_mm : Operand<OtherVT> {
166 def brtarget_mm : Operand<OtherVT> {
|
| D | Mips32r6InstrInfo.td | 20 def brtarget21 : Operand<OtherVT> {
27 def brtarget26 : Operand<OtherVT> {
34 def jmpoffset16 : Operand<OtherVT> {
|
| D | MipsInstrInfo.td | 471 def jmptarget : Operand<OtherVT> {
475 def brtarget : Operand<OtherVT> {
567 def uimm5_lsl2 : Operand<OtherVT> {
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| D | MipsInstrFPU.td | 29 SDTCisVT<2, OtherVT>]>;
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| D | MicroMips32r6InstrInfo.td | 14 def brtarget26_mm : Operand<OtherVT> {
|
| /external/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.td | 27 SDTCisVT<3, OtherVT>]>;
46 def brtarget : Operand<OtherVT>;
|
| /external/llvm/lib/Target/Sparc/ |
| D | SparcInstrInfo.td | 109 // Branch targets have OtherVT type.
110 def brtarget : Operand<OtherVT> {
114 def bprtarget : Operand<OtherVT> {
118 def bprtarget16 : Operand<OtherVT> {
140 SDTypeProfile<0, 2, [SDTCisVT<0, OtherVT>, SDTCisVT<1, i32>]>;
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonOperands.td | 580 def brtarget : Operand<OtherVT> {
584 def brtargetExt : Operand<OtherVT> {
|
| /external/llvm/include/llvm/IR/ |
| D | Intrinsics.td | 110 : LLVMType<OtherVT>{
150 def llvm_empty_ty : LLVMType<OtherVT>; // { }
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrFPStack.td | 24 SDTCisVT<2, OtherVT>]>;
27 SDTCisVT<2, OtherVT>]>;
29 SDTCisVT<2, OtherVT>]>;
|
| D | X86InstrInfo.td | 57 [SDTCisVT<0, OtherVT>,
95 def SDTX86RepStr : SDTypeProfile<0, 1, [SDTCisVT<0, OtherVT>]>;
388 // Branch targets have OtherVT type and print as pc-relative values.
389 def brtarget : Operand<OtherVT>;
390 def brtarget8 : Operand<OtherVT>;
401 // Branch targets have OtherVT type and print as pc-relative values.
405 def brtarget16 : Operand<OtherVT>;
407 def brtarget32 : Operand<OtherVT>;
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430InstrInfo.td | 31 def SDT_MSP430BrCC : SDTypeProfile<0, 2, [SDTCisVT<0, OtherVT>,
84 // Short jump targets have OtherVT type and are printed as pcrel imm values.
85 def jmptarget : Operand<OtherVT> {
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.td | 39 SDTCisVT<0, i32>, SDTCisVT<2, OtherVT>
43 SDTCisInt<0>, SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>
46 SDTCisInt<0>, SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>
565 def directbrtarget : Operand<OtherVT> {
570 def absdirectbrtarget : Operand<OtherVT> {
579 def condbrtarget : Operand<OtherVT> {
584 def abscondbrtarget : Operand<OtherVT> {
713 def pred : Operand<OtherVT> {
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreInstrInfo.td | 193 def brtarget : Operand<OtherVT>;
194 def brtarget_neg : Operand<OtherVT> {
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrFormats.td | 151 def pred : PredicateOperand<OtherVT, (ops i32imm, i32imm),
170 def cc_out : OptionalDefOperand<OtherVT, (ops CCR), (ops (i32 zero_reg))> {
178 def s_cc_out : OptionalDefOperand<OtherVT, (ops CCR), (ops (i32 CPSR))> {
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| D | ARMInstrInfo.td | 34 [SDTCisVT<0, OtherVT>, SDTCisVT<1, i32>]>;
47 SDTCisVT<5, OtherVT>]>;
405 def brtarget : Operand<OtherVT> {
412 def uncondbrtarget : Operand<OtherVT> {
418 def br_target : Operand<OtherVT> {
960 def ldstm_mode : OptionalDefOperand<OtherVT, (ops i32), (ops (i32 1))> {
|