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Searched refs:PMCCNTR_EL0 (Results 1 – 6 of 6) sorted by relevance

/external/llvm/test/CodeGen/AArch64/
Dreadcyclecounter.ll8 ; PERFMON-NEXT: mrs x0, PMCCNTR_EL0
/external/llvm/lib/Target/AArch64/Utils/
DAArch64BaseInfo.cpp447 {"pmccntr_el0", PMCCNTR_EL0, {}},
DAArch64BaseInfo.h846 PMCCNTR_EL0 = 0xdce8, // 11 011 1001 1101 000 enumerator
/external/llvm/test/MC/AArch64/
Dbasic-a64-instructions.s3852 msr PMCCNTR_EL0, x12
4402 mrs x9, PMCCNTR_EL0
/external/llvm/test/MC/Disassembler/AArch64/
Dbasic-a64-instructions.txt3325 # CHECK: msr {{pmccntr_el0|PMCCNTR_EL0}}, x12
3619 # CHECK: mrs x9, {{pmccntr_el0|PMCCNTR_EL0}}
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td419 // The cycle counter PMC register is PMCCNTR_EL0.