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Searched refs:PRIM_MODE_MASK (Results 1 – 7 of 7) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i915/
Dintel_render.c195 nr_rverts += length * scale_prim[prim & PRIM_MODE_MASK]; in choose_render()
197 if (reduced_prim[prim & PRIM_MODE_MASK] != rprim) { in choose_render()
199 rprim = reduced_prim[prim & PRIM_MODE_MASK]; in choose_render()
253 intel_render_tab_verts[prim & PRIM_MODE_MASK] (ctx, start, in intel_run_render()
/external/mesa3d/src/mesa/tnl/
Dt_vb_render.c313 assert((prim & PRIM_MODE_MASK) <= GL_POLYGON); in run_render()
317 _mesa_lookup_enum_by_nr(prim & PRIM_MODE_MASK), in run_render()
321 tab[prim & PRIM_MODE_MASK]( ctx, start, start + length, prim ); in run_render()
Dt_context.h177 #define PRIM_MODE_MASK 0x0f macro
/external/mesa3d/src/mesa/drivers/dri/r200/
Dr200_tcl.c247 tcl_render_tab_verts[flags&PRIM_MODE_MASK]( ctx, first, last, flags ); in r200EmitPrimitive()
255 tcl_render_tab_elts[flags&PRIM_MODE_MASK]( ctx, first, last, flags ); in r200EmitEltPrimitive()
272 if ((prim & PRIM_MODE_MASK) == GL_POINTS && ctx->Point.PointSprite) { in r200TclPrimitive()
/external/mesa3d/src/mesa/drivers/dri/radeon/
Dradeon_tcl.c236 tcl_render_tab_verts[flags&PRIM_MODE_MASK]( ctx, first, last, flags ); in radeonEmitPrimitive()
244 tcl_render_tab_elts[flags&PRIM_MODE_MASK]( ctx, first, last, flags ); in radeonEmitEltPrimitive()
Dradeon_swtcl.c439 _mesa_lookup_enum_by_nr(prim & PRIM_MODE_MASK), in radeon_run_render()
443 tab[prim & PRIM_MODE_MASK]( ctx, start, start + length, prim ); in radeon_run_render()
/external/mesa3d/src/mesa/tnl_dd/
Dt_dd_dmatmp.h1195 switch (prim & PRIM_MODE_MASK) { in TAG()