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Searched refs:RD1 (Results 1 – 5 of 5) sorted by relevance

/external/llvm/test/CodeGen/Mips/msa/
Delm_copy.ll100 ; MIPS32-DAG: copy_s.w [[RD1:\$[0-9]+]], [[WS]][2]
105 ; MIPS32-DAG: sw [[RD1]], 0([[RES]])
198 ; MIPS32-DAG: copy_s.w [[RD1:\$[0-9]+]], [[WS]][2]
203 ; MIPS32-DAG: sw [[RD1]], 0([[RES]])
/external/valgrind/none/tests/arm/
Dvfp.c113 #define TESTINSN_vmov_2core_2single(instruction, RD1, RD2, SN, SM, SNval, SMval) \ argument
121 "mov " #RD1 ", #0x4\n\t" \
124 "str " #RD1 ", [%0]\n\t" \
128 : #RD1, #RD2, #SN, #SM, "memory" \
130 printf("%s :: "#RD1" 0x%08x "#RD2" 0x%08x\n", \
173 #define TESTINSN_vmov_2core_double(instruction, RD1, RD2, DN, DNval0, DNval1) \ argument
179 "mov " #RD1 ", #55\n\t" \
183 "str " #RD1 ", [%0]\n\t" \
187 : #DN, #RD1, #RD2, "memory" \
189 printf("%s :: "#RD1" 0x%08x "#RD2" 0x%08x\n", \
/external/clang/lib/Sema/
DSemaChecking.cpp9538 RecordDecl *RD1, in isLayoutCompatibleStruct() argument
9541 if (const CXXRecordDecl *D1CXX = dyn_cast<CXXRecordDecl>(RD1)) { in isLayoutCompatibleStruct()
9568 Field1 = RD1->field_begin(), in isLayoutCompatibleStruct()
9569 Field1End = RD1->field_end(); in isLayoutCompatibleStruct()
9583 RecordDecl *RD1, in isLayoutCompatibleUnion() argument
9589 for (auto *Field1 : RD1->fields()) { in isLayoutCompatibleUnion()
9609 bool isLayoutCompatible(ASTContext &C, RecordDecl *RD1, RecordDecl *RD2) { in isLayoutCompatible() argument
9610 if (RD1->isUnion() != RD2->isUnion()) in isLayoutCompatible()
9613 if (RD1->isUnion()) in isLayoutCompatible()
9614 return isLayoutCompatibleUnion(C, RD1, RD2); in isLayoutCompatible()
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/external/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp3021 unsigned RD1 = RegInfo.createVirtualRegister(RC); in emitMSACBranchPseudo() local
3022 BuildMI(*FBB, FBB->end(), DL, TII->get(Mips::ADDiu), RD1) in emitMSACBranchPseudo()
3034 .addReg(RD1).addMBB(FBB).addReg(RD2).addMBB(TBB); in emitMSACBranchPseudo()
/external/libxml2/result/HTML/
Ddoc3.htm.sax1849 SAX.characters(RD1 BIOS Savior, 15)