Searched refs:RHSCC (Results 1 – 2 of 2) sorted by relevance
| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineAndOrXor.cpp | 594 ICmpInst::Predicate &RHSCC) { in foldLogOpOfMaskedICmpsHelper() argument
640 if (decomposeBitTestICmp(RHS, RHSCC, R11, R12, R2)) { in foldLogOpOfMaskedICmpsHelper()
665 if (!ICmpInst::isEquality(RHSCC)) in foldLogOpOfMaskedICmpsHelper()
697 unsigned right_type = getTypeOfMaskedICmp(A, D, E, RHSCC); in foldLogOpOfMaskedICmpsHelper()
706 ICmpInst::Predicate LHSCC = LHS->getPredicate(), RHSCC = RHS->getPredicate(); in foldLogOpOfMaskedICmps() local
708 LHSCC, RHSCC); in foldLogOpOfMaskedICmps()
710 assert(ICmpInst::isEquality(LHSCC) && ICmpInst::isEquality(RHSCC) && in foldLogOpOfMaskedICmps()
808 if (RHSCC != NEWCC) in foldLogOpOfMaskedICmps()
881 ICmpInst::Predicate LHSCC = LHS->getPredicate(), RHSCC = RHS->getPredicate(); in FoldAndOfICmps() local
884 if (PredicatesFoldable(LHSCC, RHSCC)) { in FoldAndOfICmps()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 1418 AArch64CC::CondCode RHSCC; in emitConjunctionDisjunctionTree() local
1419 SDValue CmpR = emitConjunctionDisjunctionTree(DAG, RHS, RHSCC, PushNegate, in emitConjunctionDisjunctionTree()
1422 RHSCC = AArch64CC::getInvertedCondCode(RHSCC); in emitConjunctionDisjunctionTree()
1425 CmpR, RHSCC, Depth+1); in emitConjunctionDisjunctionTree()
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