| /external/tremolo/Tremolo/ |
| D | mdctARM.s | 329 SMLAL r8, r9, r6, r10 @ (r8, r9) += s0*T[0]
335 SMLAL r8, r12,r6, r11 @ (r8, r12) -= s0*T[1]
353 SMLAL r8, r9, r7, r11 @ (r8, r9) += s2*T[0]
359 SMLAL r8, r12,r6, r11 @ (r8, r12) -= s0*T[0]
389 SMLAL r14,r12,r9, r10 @ (r14,r12) += ro2*T[0]
395 SMLAL r14,r3, r8, r10 @ (r14,r3) -= ro0*T[0]
406 SMLAL r14,r12,r7, r11 @ (r14,r12) += ri2*T[1]
412 SMLAL r14,r3, r6, r11 @ (r14,r3) -= ri0*T[1]
502 SMLAL r4, r3, r11,r10 @ (r4, r3) += s1*T[0]
505 SMLAL r11,r4, r2, r10 @ (r11,r4) += s0*T[0]
[all …]
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| /external/llvm/test/MC/ARM/ |
| D | mul-v4.s | 1 @ PR17647: MUL/MLA/SMLAL/UMLAL should be avalaibe to IAS for ARMv4 and higher
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| D | basic-arm-instructions.s | 2397 @ SMLAL
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| D | basic-thumb2-instructions.s | 2301 @ SMLAL
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 166 SMLAL, // 64bit Signed Accumulate Multiply enumerator
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| D | README.txt | 424 Should compile to use SMLAL (Signed Multiply Accumulate Long) which multiplies
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| D | ARMInstrInfo.td | 97 def ARMSmlal : SDNode<"ARMISD::SMLAL", SDT_ARM64bitmlal>;
3916 def SMLAL : AsMla1I64<0b0000111, (outs GPR:$RdLo, GPR:$RdHi),
3944 (SMLAL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, GPR:$RLo, GPR:$RHi,
4080 // Halfword multiply accumulate long: SMLAL<x><y>.
5725 // MUL/UMLAL/SMLAL/UMULL/SMULL are available on all arches, but
5736 (SMLAL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, pred:$p, cc_out:$s)>,
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| D | ARMScheduleSwift.td | 291 (instregex "SMLALS", "UMLALS", "SMLAL", "UMLAL", "MLALBB", "SMLALBT",
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| D | ARMISelDAGToDAG.cpp | 2704 case ARMISD::SMLAL:{ in Select()
2716 ARM::SMLAL : ARM::SMLALv5, in Select()
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| D | ARMScheduleA9.td | 2501 (instregex "SMULL", "SMULLv5", "UMULL", "UMULLv5", "SMLAL$", "UMLAL",
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| D | ARMInstrFormats.td | 873 // SMLAL*
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| D | ARMISelLowering.cpp | 1203 case ARMISD::SMLAL: return "ARMISD::SMLAL"; in getTargetNodeName()
8555 unsigned FinalOpc = (Opc == ISD::SMUL_LOHI) ? ARMISD::SMLAL : ARMISD::UMLAL; in AddCombineTo64bitMLAL()
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| D | ARMInstrThumb2.td | 2841 // Halfword multiple accumulate long: SMLAL<x><y>
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SchedCyclone.td | 522 (instregex "MLA","MLS","SMLAL","SMLSL","UMLAL","UMLSL",
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| D | AArch64InstrInfo.td | 3437 defm SMLAL : SIMDLongThreeVectorTiedBHS<0, 0b1000, "smlal",
3484 // Additional patterns for SMLAL/SMLSL and UMLAL/UMLSL
4549 defm SMLAL : SIMDVectorIndexedLongSDTied<0, 0b0010, "smlal",
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| /external/vixl/doc/ |
| D | supported-instructions.md | 3194 ### SMLAL ### subsection
3204 ### SMLAL ### subsection
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 1785 # SMLAL
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| D | basic-arm-instructions.txt | 1605 # SMLAL
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| /external/llvm/test/MC/AArch64/ |
| D | arm64-advsimd.s | 1171 ; AdvSIMD SMLAL
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| /external/valgrind/none/tests/arm/ |
| D | v6intARM.stdout.exp | 574 SMLAL
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| D | v6media.stdout.exp | 46 SMLAL
|