Searched refs:SOP1 (Results 1 – 10 of 10) sorted by relevance
| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | SIInstrFormats.td | 33 : SOP1 <op, (outs SReg_32:$dst), (ins SReg_32:$src0), opName, pattern>;
36 : SOP1 <op, (outs SReg_64:$dst), (ins SReg_64:$src0), opName, pattern>;
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| D | SIInstrInfo.td | 279 class SOP1 <bits<8> op, dag outs, dag ins, string asm, list<dag> pattern> :
289 let EncodingType = 6; //SIInstrEncodingType::SOP1
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| D | SIInstructions.td | 897 def S_MOV_IMM_I32 : SOP1 <
909 def S_MOV_IMM_I64 : SOP1 <
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| /external/llvm/docs/ |
| D | AMDGPUUsage.rst | 40 SOP1 Instructions
42 All SOP1 instructions are supported.
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIDefines.h | 22 SOP1 = 1 << 5, enumerator
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| D | SIInstrFormats.td | 24 field bits<1> SOP1 = 0;
56 let TSFlags{5} = SOP1;
246 class SOP1 <dag outs, dag ins, string asm, list<dag> pattern> :
253 let SOP1 = 1;
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| D | SIInstrInfo.h | 171 return MI.getDesc().TSFlags & SIInstrFlags::SOP1; in isSOP1()
175 return get(Opcode).TSFlags & SIInstrFlags::SOP1; in isSOP1()
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| D | SIInstrInfo.td | 666 SOP1 <outs, ins, "", pattern>,
673 SOP1 <outs, ins, asm, []>,
681 SOP1 <outs, ins, asm, []>,
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| D | SIInstructions.td | 101 // SOP1 Instructions
2144 // SOP1 Patterns
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| /external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
| D | SIMCCodeEmitter.cpp | 43 SOP1 = 6, enumerator
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