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Searched refs:SPLAT (Results 1 – 5 of 5) sorted by relevance

/external/llvm/test/Transforms/CodeGenPrepare/X86/
Dx86-shuffle-sink.ll32 ; CHECK: [[SPLAT:%[0-9a-zA-Z_]+]] = shufflevector
33 ; CHECK: shl <8 x i16> %lhs, [[SPLAT]]
72 ; CHECK-SSE2: [[SPLAT:%[0-9a-zA-Z_]+]] = shufflevector
73 ; CHECK-SSE2: ashr <4 x i32> %lhs, [[SPLAT]]
93 ; CHECK-SSE2: [[SPLAT:%[0-9a-zA-Z_]+]] = shufflevector
94 ; CHECK-SSE2: lshr <2 x i64> %lhs, [[SPLAT]]
/external/llvm/test/Transforms/LoopVectorize/
Dreverse_induction.ll9 ; CHECK: add <4 x i64> %[[SPLAT:.*]], <i64 0, i64 -1, i64 -2, i64 -3>
10 ; CHECK: add <4 x i64> %[[SPLAT]], <i64 -4, i64 -5, i64 -6, i64 -7>
33 ; CHECK: add <4 x i128> %[[SPLAT:.*]], <i128 0, i128 -1, i128 -2, i128 -3>
34 ; CHECK: add <4 x i128> %[[SPLAT]], <i128 -4, i128 -5, i128 -6, i128 -7>
56 ; CHECK: add <4 x i16> %[[SPLAT:.*]], <i16 0, i16 -1, i16 -2, i16 -3>
57 ; CHECK: add <4 x i16> %[[SPLAT]], <i16 -4, i16 -5, i16 -6, i16 -7>
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.h176 SPLAT, enumerator
DSystemZOperators.td201 def z_splat : SDNode<"SystemZISD::SPLAT", SDT_ZVecBinaryInt>;
DSystemZISelLowering.cpp4156 return DAG.getNode(SystemZISD::SPLAT, DL, VT, Op.getOperand(0), in lowerVECTOR_SHUFFLE()
4467 OPCODE(SPLAT); in getTargetNodeName()