Searched refs:SPSR_irq (Results 1 – 6 of 6) sorted by relevance
| /external/llvm/test/MC/ARM/ |
| D | move-banked-regs.s | 56 @ CHECK-ARM: mrs r1, SPSR_irq @ encoding: [0x00,0x13,0x40,0xe1]
59 @ CHECK-THUMB: mrs r1, SPSR_irq @ encoding: [0xf0,0xf3,0x30,0x81]
166 @ CHECK-ARM: msr SPSR_irq, r11 @ encoding: [0x0b,0xf3,0x60,0xe1]
169 @ CHECK-THUMB: msr SPSR_irq, r11 @ encoding: [0x9b,0xf3,0x30,0x80]
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | move-banked-regs-thumb.txt | 40 @ CHECK: mrs r1, SPSR_irq
117 @ CHECK: msr SPSR_irq, r11
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| D | move-banked-regs-arm.txt | 41 @ CHECK: mrs r1, SPSR_irq
115 @ CHECK: msr SPSR_irq, r11
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| /external/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.cpp | 418 {"spsr_irq", SPSR_irq, {}},
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| D | AArch64BaseInfo.h | 817 SPSR_irq = 0xe218, // 11 100 0100 0011 000 enumerator
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| /external/llvm/test/MC/AArch64/ |
| D | basic-a64-instructions.s | 3823 msr SPSR_irq, x12
4371 mrs x9, SPSR_irq
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