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/external/llvm/test/Analysis/CostModel/X86/
Dtestshiftlshr.ll1 ; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=core2 < %s | FileCheck --check-prefix=SSE2-CODEGEN %s
2 …triple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
7 ; SSE2: shift2i16
8 ; SSE2: cost of 4 {{.*}} lshr
9 ; SSE2-CODEGEN: shift2i16
10 ; SSE2-CODEGEN: psrlq
19 ; SSE2: shift4i16
20 ; SSE2: cost of 16 {{.*}} lshr
21 ; SSE2-CODEGEN: shift4i16
22 ; SSE2-CODEGEN: psrld
[all …]
Dtestshiftshl.ll1 ; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=core2 < %s | FileCheck --check-prefix=SSE2-CODEGEN %s
2 …triple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
7 ; SSE2: shift2i16
8 ; SSE2: cost of 4 {{.*}} shl
9 ; SSE2-CODEGEN: shift2i16
10 ; SSE2-CODEGEN: psllq
19 ; SSE2: shift4i16
20 ; SSE2: cost of 10 {{.*}} shl
21 ; SSE2-CODEGEN: shift4i16
22 ; SSE2-CODEGEN: pmuludq
[all …]
Dtestshiftashr.ll1 ; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=core2 < %s | FileCheck --check-prefix=SSE2-CODEGEN %s
2 …triple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
7 ; SSE2: shift2i16
8 ; SSE2: cost of 12 {{.*}} ashr
9 ; SSE2-CODEGEN: shift2i16
10 ; SSE2-CODEGEN: psrlq
19 ; SSE2: shift4i16
20 ; SSE2: cost of 16 {{.*}} ashr
21 ; SSE2-CODEGEN: shift4i16
22 ; SSE2-CODEGEN: psrad
[all …]
Dsse-itoi.ll1 …riple=x86_64-apple-darwin -mattr=+sse2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s
5 ; SSE2: zext_v16i16_to_v16i32
6 ; SSE2: cost of 6 {{.*}} zext
18 ; SSE2: sext_v16i16_to_v16i32
19 ; SSE2: cost of 8 {{.*}} sext
31 ; SSE2: zext_v8i16_to_v8i32
32 ; SSE2: cost of 3 {{.*}} zext
44 ; SSE2: sext_v8i16_to_v8i32
45 ; SSE2: cost of 4 {{.*}} sext
57 ; SSE2: zext_v4i16_to_v4i32
[all …]
Dsitofp.ll1 …darwin -mattr=+sse2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE --check-prefix=SSE2 %s
7 ; SSE2-LABEL: sitofpv2i8v2double
8 ; SSE2: cost of 20 {{.*}} sitofp
23 ; SSE2-LABEL: sitofpv4i8v4double
24 ; SSE2: cost of 40 {{.*}} sitofp
39 ; SSE2-LABEL: sitofpv8i8v8double
40 ; SSE2: cost of 80 {{.*}} sitofp
55 ; SSE2-LABEL: sitofpv16i8v16double
56 ; SSE2: cost of 160 {{.*}} sitofp
71 ; SSE2-LABEL: sitofpv32i8v32double
[all …]
Duitofp.ll1 …darwin -mattr=+sse2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE --check-prefix=SSE2 %s
8 ; SSE2-LABEL: uitofpv2i8v2double
9 ; SSE2: cost of 20 {{.*}} uitofp
24 ; SSE2-LABEL: uitofpv4i8v4double
25 ; SSE2: cost of 40 {{.*}} uitofp
40 ; SSE2-LABEL: uitofpv8i8v8double
41 ; SSE2: cost of 80 {{.*}} uitofp
56 ; SSE2-LABEL: uitofpv16i8v16double
57 ; SSE2: cost of 160 {{.*}} uitofp
72 ; SSE2-LABEL: uitofpv32i8v32double
[all …]
/external/llvm/test/CodeGen/X86/
Dvselect-minmax.ll1 … -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
9 ; SSE2-LABEL: test1:
10 ; SSE2: # BB#0: # %entry
11 ; SSE2-NEXT: movdqa %xmm1, %xmm2
12 ; SSE2-NEXT: pcmpgtb %xmm0, %xmm2
13 ; SSE2-NEXT: pand %xmm2, %xmm0
14 ; SSE2-NEXT: pandn %xmm1, %xmm2
15 ; SSE2-NEXT: por %xmm2, %xmm0
16 ; SSE2-NEXT: retq
34 ; SSE2-LABEL: test2:
[all …]
Dvec_minmax_uint.ll2 …known-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
15 ; SSE2-LABEL: max_gt_v2i64:
16 ; SSE2: # BB#0:
17 ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
18 ; SSE2-NEXT: movdqa %xmm1, %xmm3
19 ; SSE2-NEXT: pxor %xmm2, %xmm3
20 ; SSE2-NEXT: pxor %xmm0, %xmm2
21 ; SSE2-NEXT: movdqa %xmm2, %xmm4
22 ; SSE2-NEXT: pcmpgtd %xmm3, %xmm4
23 ; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
[all …]
Dlower-vec-shift-2.ll2 ; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+sse2 < %s | FileCheck %s --check-prefix=SSE2
6 ; SSE2-LABEL: test1:
7 ; SSE2: # BB#0: # %entry
8 ; SSE2-NEXT: movd %xmm1, %eax
9 ; SSE2-NEXT: movzwl %ax, %eax
10 ; SSE2-NEXT: movd %eax, %xmm1
11 ; SSE2-NEXT: psllw %xmm1, %xmm0
12 ; SSE2-NEXT: retq
27 ; SSE2-LABEL: test2:
28 ; SSE2: # BB#0: # %entry
[all …]
Dvec_minmax_sint.ll2 …known-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
15 ; SSE2-LABEL: max_gt_v2i64:
16 ; SSE2: # BB#0:
17 ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,0,2147483648,0]
18 ; SSE2-NEXT: movdqa %xmm1, %xmm3
19 ; SSE2-NEXT: pxor %xmm2, %xmm3
20 ; SSE2-NEXT: pxor %xmm0, %xmm2
21 ; SSE2-NEXT: movdqa %xmm2, %xmm4
22 ; SSE2-NEXT: pcmpgtd %xmm3, %xmm4
23 ; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
[all …]
Dmemcpy-2.ll1 …s -mattr=+sse2 -mtriple=i686-apple-darwin -mcpu=core2 | FileCheck %s -check-prefix=SSE2-Darwin
2 …%s -mattr=+sse2 -mtriple=i686-pc-mingw32 -mcpu=core2 | FileCheck %s -check-prefix=SSE2-Mingw32
14 ; SSE2-Darwin-LABEL: t1:
15 ; SSE2-Darwin: movsd _.str+16, %xmm0
16 ; SSE2-Darwin: movsd %xmm0, 16(%esp)
17 ; SSE2-Darwin: movaps _.str, %xmm0
18 ; SSE2-Darwin: movaps %xmm0
19 ; SSE2-Darwin: movb $0, 24(%esp)
21 ; SSE2-Mingw32-LABEL: t1:
22 ; SSE2-Mingw32: movsd _.str+16, %xmm0
[all …]
Dvector-blend.ll1 …c < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
10 ; SSE2-LABEL: vsel_float:
11 ; SSE2: # BB#0: # %entry
12 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,3]
13 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,1,3]
14 ; SSE2-NEXT: retq
37 ; SSE2-LABEL: vsel_float2:
38 ; SSE2: # BB#0: # %entry
39 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
40 ; SSE2-NEXT: movaps %xmm1, %xmm0
[all …]
Dvector-shuffle-128-v8.ll2 …known-unknown -mcpu=x86-64 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
38 ; SSE2-LABEL: shuffle_v8i16_456789AB:
39 ; SSE2: # BB#0:
40 ; SSE2-NEXT: shufpd {{.*#+}} xmm0 = xmm0[1],xmm1[0]
41 ; SSE2-NEXT: retq
64 ; SSE2-LABEL: shuffle_v8i16_00000000:
65 ; SSE2: # BB#0:
66 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,0,3]
67 ; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
68 ; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,4,4,4]
[all …]
Dvector-shift-ashr-128.ll2 …known-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
10 …known -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=X32-SSE --check-prefix=X32-SSE2
17 ; SSE2-LABEL: var_shift_v2i64:
18 ; SSE2: # BB#0:
19 ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1]
20 ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
21 ; SSE2-NEXT: movdqa %xmm2, %xmm4
22 ; SSE2-NEXT: psrlq %xmm3, %xmm4
23 ; SSE2-NEXT: psrlq %xmm1, %xmm2
24 ; SSE2-NEXT: movsd {{.*#+}} xmm4 = xmm2[0],xmm4[1]
[all …]
Dvector-shift-shl-128.ll2 …known-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
10 …known -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=X32-SSE --check-prefix=X32-SSE2
17 ; SSE2-LABEL: var_shift_v2i64:
18 ; SSE2: # BB#0:
19 ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1]
20 ; SSE2-NEXT: movdqa %xmm0, %xmm2
21 ; SSE2-NEXT: psllq %xmm3, %xmm2
22 ; SSE2-NEXT: psllq %xmm1, %xmm0
23 ; SSE2-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1]
24 ; SSE2-NEXT: movapd %xmm2, %xmm0
[all …]
Dvector-tzcnt-128.ll2 …ple=x86_64-unknown-unknown | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
10 ; SSE2-LABEL: testv2i64:
11 ; SSE2: # BB#0:
12 ; SSE2-NEXT: movd %xmm0, %rax
13 ; SSE2-NEXT: bsfq %rax, %rax
14 ; SSE2-NEXT: movl $64, %ecx
15 ; SSE2-NEXT: cmoveq %rcx, %rax
16 ; SSE2-NEXT: movd %rax, %xmm1
17 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
18 ; SSE2-NEXT: movd %xmm0, %rax
[all …]
Dvector-shift-lshr-128.ll2 …known-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
10 …known -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=X32-SSE --check-prefix=X32-SSE2
17 ; SSE2-LABEL: var_shift_v2i64:
18 ; SSE2: # BB#0:
19 ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1]
20 ; SSE2-NEXT: movdqa %xmm0, %xmm2
21 ; SSE2-NEXT: psrlq %xmm3, %xmm2
22 ; SSE2-NEXT: psrlq %xmm1, %xmm0
23 ; SSE2-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1]
24 ; SSE2-NEXT: movapd %xmm2, %xmm0
[all …]
Dvector-sext.ll2 … -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
12 ; SSE2-LABEL: sext_16i8_to_8i16:
13 ; SSE2: # BB#0: # %entry
14 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
15 ; SSE2-NEXT: psraw $8, %xmm0
16 ; SSE2-NEXT: retq
45 ; SSE2-LABEL: sext_16i8_to_16i16:
46 ; SSE2: # BB#0: # %entry
47 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],x…
48 ; SSE2-NEXT: psraw $8, %xmm2
[all …]
Dvector-rotate-128.ll2 …known-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
10 …known -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=X32-SSE --check-prefix=X32-SSE2
17 ; SSE2-LABEL: var_rotate_v2i64:
18 ; SSE2: # BB#0:
19 ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [64,64]
20 ; SSE2-NEXT: psubq %xmm1, %xmm2
21 ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1]
22 ; SSE2-NEXT: movdqa %xmm0, %xmm4
23 ; SSE2-NEXT: psllq %xmm3, %xmm4
24 ; SSE2-NEXT: movdqa %xmm0, %xmm3
[all …]
Dvector-shuffle-128-v16.ll2 …known-unknown -mcpu=x86-64 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
12 ; FIXME: SSE2 should look like the following:
20 ; SSE2-LABEL: shuffle_v16i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00:
21 ; SSE2: # BB#0:
22 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
23 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,0,3]
24 ; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,0,0,4,5,6,7]
25 ; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,4,4,4]
26 ; SSE2-NEXT: retq
55 ; SSE2-LABEL: shuffle_v16i8_00_00_00_00_00_00_00_00_01_01_01_01_01_01_01_01:
[all …]
Dvector-popcnt-128.ll2 …ple=x86_64-unknown-unknown | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
10 ; SSE2-LABEL: testv2i64:
11 ; SSE2: # BB#0:
12 ; SSE2-NEXT: movdqa %xmm0, %xmm1
13 ; SSE2-NEXT: psrlq $1, %xmm1
14 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm1
15 ; SSE2-NEXT: psubq %xmm1, %xmm0
16 ; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [3689348814741910323,3689348814741910323]
17 ; SSE2-NEXT: movdqa %xmm0, %xmm2
18 ; SSE2-NEXT: pand %xmm1, %xmm2
[all …]
Dvselect-2.ll2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
6 ; SSE2-LABEL: test1:
7 ; SSE2: # BB#0:
8 ; SSE2-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
9 ; SSE2-NEXT: movapd %xmm1, %xmm0
10 ; SSE2-NEXT: retq
21 ; SSE2-LABEL: test2:
22 ; SSE2: # BB#0:
23 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
24 ; SSE2-NEXT: retq
[all …]
Dpmul.ll2 …RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
7 ; SSE2-LABEL: mul8c:
8 ; SSE2: # BB#0: # %entry
9 ; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [117,117,117,117,117,117,117,117,117,117,117,117,117,117,117…
10 ; SSE2-NEXT: psraw $8, %xmm1
11 ; SSE2-NEXT: movdqa %xmm0, %xmm2
12 ; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
13 ; SSE2-NEXT: psraw $8, %xmm2
14 ; SSE2-NEXT: pmullw %xmm1, %xmm2
15 ; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255]
[all …]
Dvector-lzcnt-128.ll1 …ple=x86_64-unknown-unknown | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
11 ; SSE2-LABEL: testv2i64:
12 ; SSE2: # BB#0:
13 ; SSE2-NEXT: movd %xmm0, %rax
14 ; SSE2-NEXT: bsrq %rax, %rax
15 ; SSE2-NEXT: movl $127, %ecx
16 ; SSE2-NEXT: cmoveq %rcx, %rax
17 ; SSE2-NEXT: xorq $63, %rax
18 ; SSE2-NEXT: movd %rax, %xmm1
19 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
[all …]
Dvec_setcc.ll1 …llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=sse2 | FileCheck %s -check-prefix=SSE2
9 ; SSE2-LABEL: v16i8_icmp_uge:
10 ; SSE2: pmaxub %xmm0, %xmm1
11 ; SSE2: pcmpeqb %xmm1, %xmm0
26 ; SSE2-LABEL: v16i8_icmp_ule:
27 ; SSE2: pminub %xmm0, %xmm1
28 ; SSE2: pcmpeqb %xmm1, %xmm0
44 ; SSE2-LABEL: v8i16_icmp_uge:
45 ; SSE2: psubusw %xmm0, %xmm1
47 ; SSE2: pcmpeqw %xmm1, %xmm0
[all …]

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