/external/llvm/lib/Target/X86/InstPrinter/ |
D | X86InstComments.cpp | 38 static MVT getRegOperandVectorVT(const MCInst *MI, const MVT &ScalarVT, in getRegOperandVectorVT() argument 41 return MVT::getVectorVT(ScalarVT, in getRegOperandVectorVT() 42 getVectorRegSize(OpReg)/ScalarVT.getSizeInBits()); in getRegOperandVectorVT()
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXISelDAGToDAG.cpp | 707 MVT ScalarVT = SimpleVT.getScalarType(); in SelectLoad() local 709 unsigned fromTypeWidth = std::max(8U, ScalarVT.getSizeInBits()); in SelectLoad() 713 else if (ScalarVT.isFloatingPoint()) in SelectLoad() 935 MVT ScalarVT = SimpleVT.getScalarType(); in SelectLoadVector() local 937 unsigned FromTypeWidth = std::max(8U, ScalarVT.getSizeInBits()); in SelectLoadVector() 944 else if (ScalarVT.isFloatingPoint()) in SelectLoadVector() 2090 MVT ScalarVT = SimpleVT.getScalarType(); in SelectStore() local 2091 unsigned toTypeWidth = ScalarVT.getSizeInBits(); in SelectStore() 2093 if (ScalarVT.isFloatingPoint()) in SelectStore() 2312 MVT ScalarVT = StoreVT.getSimpleVT().getScalarType(); in SelectStoreVector() local [all …]
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/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelLowering.cpp | 428 EVT ScalarVT = VT.getScalarType(); in isFPImmLegal() local 429 return (ScalarVT == MVT::f32 || ScalarVT == MVT::f64); in isFPImmLegal() 434 EVT ScalarVT = VT.getScalarType(); in ShouldShrinkFPConstant() local 435 return (ScalarVT != MVT::f32 && ScalarVT != MVT::f64); in ShouldShrinkFPConstant() 2274 MVT ScalarVT = VT.getScalarType(); in LowerSIGN_EXTEND_INREG() local 2289 Args[I] = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, ScalarVT, Args[I], VTOp); in LowerSIGN_EXTEND_INREG()
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D | SIISelLowering.cpp | 1624 EVT ScalarVT = VT.getScalarType(); in performUCharToFloatCombine() local 1625 if (ScalarVT != MVT::f32) in performUCharToFloatCombine()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 7661 EVT ScalarVT = Op.getValueType().getScalarType(), in LowerVectorLoad() local 7668 if (ScalarVT != ScalarMemVT) in LowerVectorLoad() 7670 DAG.getExtLoad(LN->getExtensionType(), dl, ScalarVT, LoadChain, in LowerVectorLoad() 7678 DAG.getLoad(ScalarVT, dl, LoadChain, BasePtr, in LowerVectorLoad() 7758 EVT ScalarVT = Value.getValueType().getScalarType(), in LowerVectorStore() local 7765 ISD::EXTRACT_VECTOR_ELT, dl, ScalarVT, Value, in LowerVectorStore() 7768 if (ScalarVT != ScalarMemVT) in LowerVectorStore()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 5602 EVT ScalarVT = VT.getVectorElementType(); in LowerVECTOR_SHUFFLE() local 5604 if (ScalarVT.getSizeInBits() < 32 && ScalarVT.isInteger()) in LowerVECTOR_SHUFFLE() 5605 ScalarVT = MVT::i32; in LowerVECTOR_SHUFFLE() 5609 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ScalarVT, SrcVec, SrcLaneV), in LowerVECTOR_SHUFFLE()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 3371 EVT ScalarVT = ScalarOp.getValueType(); in FoldConstantVectorArithmetic() local 3375 if (ScalarVT.isInteger() && ScalarVT.bitsGT(InSVT)) in FoldConstantVectorArithmetic()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 9973 MVT ScalarVT = VT.getVectorElementType(); in splitAndLowerVectorShuffle() local 9974 MVT SplitVT = MVT::getVectorVT(ScalarVT, NumElements / 2); in splitAndLowerVectorShuffle() 25790 EVT ScalarVT = VT.getVectorElementType(); in detectAVGPattern() local 25791 if (!((ScalarVT == MVT::i8 || ScalarVT == MVT::i16) && in detectAVGPattern() 25798 if (InScalarVT.getSizeInBits() <= ScalarVT.getSizeInBits()) in detectAVGPattern() 25858 if (IsConstVectorInRange(Operands[1], 1, ScalarVT == MVT::i8 ? 256 : 65536) && in detectAVGPattern() 27116 EVT ScalarVT = VT.getScalarType(); in PerformFMACombine() local 27117 if ((ScalarVT != MVT::f32 && ScalarVT != MVT::f64) || !Subtarget->hasAnyFMA()) in PerformFMACombine()
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D | X86InstrSSE.td | 3351 ValueType vt, ValueType ScalarVT, 3397 ValueType vt, ValueType ScalarVT, 3425 (ScalarVT (IMPLICIT_DEF)), RC:$src)>; 3442 def : Pat<(ScalarVT (OpNode (load addr:$src))), 3443 (!cast<Instruction>("V"#NAME#Suffix##m) (ScalarVT (IMPLICIT_DEF)),
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