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Searched refs:ShiftBits (Results 1 – 4 of 4) sorted by relevance

/external/llvm/lib/Target/PowerPC/
DPPCRegisterInfo.cpp536 unsigned ShiftBits = getEncodingValue(DestReg)*4; in lowerCRRestore() local
539 .addReg(Reg1, RegState::Kill).addImm(32-ShiftBits).addImm(0) in lowerCRRestore()
623 unsigned ShiftBits = getEncodingValue(DestReg); in lowerCRBitRestore() local
628 .addImm(ShiftBits ? 32 - ShiftBits : 0) in lowerCRBitRestore()
629 .addImm(ShiftBits) in lowerCRBitRestore()
630 .addImm(ShiftBits); in lowerCRBitRestore()
/external/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp1748 unsigned ShiftBits = AndRHSC.countTrailingZeros(); in SimplifySetCC() local
1755 DAG.getConstant(ShiftBits, dl, in SimplifySetCC()
1757 SDValue CmpRHS = DAG.getConstant(C1.lshr(ShiftBits), dl, CmpTy); in SimplifySetCC()
1768 unsigned ShiftBits; in SimplifySetCC() local
1772 ShiftBits = C1.countTrailingOnes(); in SimplifySetCC()
1776 ShiftBits = C1.countTrailingZeros(); in SimplifySetCC()
1778 NewC = NewC.lshr(ShiftBits); in SimplifySetCC()
1779 if (ShiftBits && NewC.getMinSignedBits() <= 64 && in SimplifySetCC()
1787 DAG.getConstant(ShiftBits, dl, ShiftTy)); in SimplifySetCC()
/external/llvm/lib/Analysis/
DBasicAliasAnalysis.cpp448 if (unsigned ShiftBits = 64 - PointerSize) { in DecomposeGEPExpression() local
449 Scale <<= ShiftBits; in DecomposeGEPExpression()
450 Scale = (int64_t)Scale >> ShiftBits; in DecomposeGEPExpression()
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp4619 SDValue ShiftBits = DAG.getConstant(SubVecNumElems, dl, MVT::i8); in Insert1BitVector() local
4620 Vec = DAG.getNode(X86ISD::VSRLI, dl, OpVT, Vec, ShiftBits); in Insert1BitVector()
4621 Vec = DAG.getNode(X86ISD::VSHLI, dl, OpVT, Vec, ShiftBits); in Insert1BitVector()
4631 SDValue ShiftBits = DAG.getConstant(SubVecNumElems, dl, MVT::i8); in Insert1BitVector() local
4632 Vec = DAG.getNode(X86ISD::VSHLI, dl, OpVT, Vec, ShiftBits); in Insert1BitVector()
4633 Vec = DAG.getNode(X86ISD::VSRLI, dl, OpVT, Vec, ShiftBits); in Insert1BitVector()