Searched refs:ShiftVT (Results 1 – 3 of 3) sorted by relevance
/external/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 4697 EVT ShiftVT = N0.getOperand(1).getValueType(); in PerformDAGCombine() local 4702 ShiftVT)); in PerformDAGCombine() 4704 DAG.getConstant(NewSraAmt, SDLoc(N0), ShiftVT)); in PerformDAGCombine()
|
/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 7462 MVT ShiftVT = MVT::getVectorVT(ShiftSVT, Size / Scale); in lowerVectorShuffleAsShift() local 7463 assert(DAG.getTargetLoweringInfo().isTypeLegal(ShiftVT) && in lowerVectorShuffleAsShift() 7465 V = DAG.getBitcast(ShiftVT, V); in lowerVectorShuffleAsShift() 7467 V = DAG.getNode(OpCode, DL, ShiftVT, V, in lowerVectorShuffleAsShift() 18363 MVT ShiftVT = MVT::getVectorVT(MVT::i16, NumElts / 2); in LowerScalarImmediateShift() local 18381 SDValue SHL = getTargetVShiftByConstNode(X86ISD::VSHLI, dl, ShiftVT, in LowerScalarImmediateShift() 18392 SDValue SRL = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, ShiftVT, in LowerScalarImmediateShift()
|
/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 4558 EVT ShiftVT = N->getOperand(1).getValueType(); in LowerShift() local 4559 SDValue NegatedCount = DAG.getNode(ISD::SUB, dl, ShiftVT, in LowerShift() 4560 getZeroVector(ShiftVT, DAG, dl), in LowerShift()
|