/external/llvm/lib/Target/Mips/ |
D | MipsSEISelDAGToDAG.cpp | 492 unsigned SplatBitSize; in selectVSplat() local 495 if (!Node->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, HasAnyUndefs, in selectVSplat() 886 unsigned SplatBitSize; in selectNode() local 895 if (!BVN->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, in selectNode() 900 switch (SplatBitSize) { in selectNode()
|
D | MipsSEISelLowering.cpp | 607 unsigned SplatBitSize; in isVSplat() local 610 if (!Node->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, HasAnyUndefs, in isVSplat() 632 unsigned SplatBitSize; in isVectorAllOnes() local 637 if (BVN->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, HasAnyUndefs)) in isVectorAllOnes() 853 unsigned SplatBitSize; in performDSPShiftCombine() local 862 !BV->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, HasAnyUndefs, in performDSPShiftCombine() 864 (SplatBitSize != EltSize) || in performDSPShiftCombine() 2349 unsigned SplatBitSize; in lowerBUILD_VECTOR() local 2355 if (Node->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, in lowerBUILD_VECTOR() 2357 !Subtarget.isLittle()) && SplatBitSize <= 64) { in lowerBUILD_VECTOR() [all …]
|
/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 4751 unsigned SplatBitSize, SelectionDAG &DAG, in isNEONModifiedImm() argument 4762 SplatBitSize = 32; in isNEONModifiedImm() 4764 switch (SplatBitSize) { in isNEONModifiedImm() 5367 unsigned SplatBitSize; in LowerBUILD_VECTOR() local 5369 if (BVN->isConstantSplat(SplatBits, SplatUndef, SplatBitSize, HasAnyUndefs)) { in LowerBUILD_VECTOR() 5370 if (SplatBitSize <= 64) { in LowerBUILD_VECTOR() 5374 SplatUndef.getZExtValue(), SplatBitSize, in LowerBUILD_VECTOR() 5385 SplatUndef.getZExtValue(), SplatBitSize, in LowerBUILD_VECTOR() 5394 if ((VT == MVT::v2f32 || VT == MVT::v4f32) && SplatBitSize == 32) { in LowerBUILD_VECTOR() 8820 unsigned SplatBitSize; in PerformANDCombine() local [all …]
|
/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.cpp | 2219 unsigned SplatBitSize; in LowerBUILD_VECTOR() local 2225 (BVN->isConstantSplat(APSplatBits, APSplatUndef, SplatBitSize, in LowerBUILD_VECTOR() 2226 HasAnyUndefs, 0, true) && SplatBitSize <= 16)) { in LowerBUILD_VECTOR() 2228 int32_t SextVal = ((int32_t) (SplatBits << (32 - SplatBitSize)) >> in LowerBUILD_VECTOR() 2229 (32 - SplatBitSize)); in LowerBUILD_VECTOR()
|
/external/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 4087 unsigned SplatBitSize; in lowerBUILD_VECTOR() local 4089 if (BVN->isConstantSplat(SplatBits, SplatUndef, SplatBitSize, HasAnyUndefs, in lowerBUILD_VECTOR() 4091 SplatBitSize <= 64) { in lowerBUILD_VECTOR() 4104 SplatBitSize); in lowerBUILD_VECTOR() 4113 Op = tryBuildVectorReplicate(DAG, TII, DL, VT, Value, SplatBitSize); in lowerBUILD_VECTOR() 4267 unsigned SplatBitSize; in lowerShift() local 4271 if (BVN->isConstantSplat(SplatBits, SplatUndef, SplatBitSize, HasAnyUndefs, in lowerShift() 4273 SplatBitSize == ElemBitSize) { in lowerShift()
|
/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 5642 unsigned SplatBitSize; in resolveBuildVector() local 5644 if (BVN->isConstantSplat(SplatBits, SplatUndef, SplatBitSize, HasAnyUndefs)) { in resolveBuildVector() 5645 unsigned NumSplats = VT.getSizeInBits() / SplatBitSize; in resolveBuildVector() 5648 CnstBits <<= SplatBitSize; in resolveBuildVector() 5649 UndefBits <<= SplatBitSize; in resolveBuildVector() 6499 unsigned SplatBitSize; in getVShiftImm() local 6501 if (!BVN || !BVN->isConstantSplat(SplatBits, SplatUndef, SplatBitSize, in getVShiftImm() 6503 SplatBitSize > ElementBits) in getVShiftImm() 8299 unsigned SplatBitSize; in tryCombineShiftImm() local 8301 if (!BVN->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, in tryCombineShiftImm() [all …]
|
/external/llvm/lib/CodeGen/SelectionDAG/ |
D | DAGCombiner.cpp | 758 unsigned SplatBitSize; in isConstantSplatVector() local 761 return (C->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, in isConstantSplatVector() 763 EltVT.getSizeInBits() >= SplatBitSize); in isConstantSplatVector() 3107 unsigned SplatBitSize; in visitAND() local 3110 SplatBitSize, HasAnyUndefs); in visitAND() 3126 if (BitWidth > SplatBitSize) in visitAND() 3128 SplatBitSize < BitWidth; in visitAND() 3129 SplatBitSize = SplatBitSize * 2) in visitAND() 3130 SplatValue |= SplatValue.shl(SplatBitSize); in visitAND() 3134 if (SplatBitSize % BitWidth == 0) { in visitAND() [all …]
|
D | SelectionDAG.cpp | 7165 unsigned &SplatBitSize, in isConstantSplat() argument 7225 SplatBitSize = sz; in isConstantSplat()
|
/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 6935 unsigned SplatBitSize; in LowerBUILD_VECTOR() local 6937 if (! BVN->isConstantSplat(APSplatBits, APSplatUndef, SplatBitSize, in LowerBUILD_VECTOR() 6939 SplatBitSize > 32) in LowerBUILD_VECTOR() 6944 unsigned SplatSize = SplatBitSize / 8; in LowerBUILD_VECTOR() 6960 int32_t SextVal= (int32_t(SplatBits << (32-SplatBitSize)) >> in LowerBUILD_VECTOR() 6961 (32-SplatBitSize)); in LowerBUILD_VECTOR() 7018 unsigned TypeShiftAmt = i & (SplatBitSize-1); in LowerBUILD_VECTOR() 7055 ((unsigned)i >> (SplatBitSize-TypeShiftAmt)))) { in LowerBUILD_VECTOR()
|
/external/llvm/include/llvm/CodeGen/ |
D | SelectionDAGNodes.h | 1680 unsigned &SplatBitSize, bool &HasAnyUndefs,
|
/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 25363 unsigned SplatBitSize; in VectorZextCombine() local 25366 SplatBitSize, HasAnyUndefs)) in VectorZextCombine() 25371 if (SplatBitSize > ResSize || in VectorZextCombine()
|