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Searched refs:Sub0 (Results 1 – 5 of 5) sorted by relevance

/external/clang/test/SemaTemplate/
Dinstantiate-subscript.cpp4 struct Sub0 { struct
24 template struct Subscript0<Sub0, int, int&>;
26 template struct Subscript0<Sub1, Sub0, long&>; // expected-note{{instantiation}}
/external/llvm/lib/Target/Sparc/
DSparcISelDAGToDAG.cpp245 SDValue Sub0 = CurDAG->getTargetExtractSubreg(SP::sub_even, dl, MVT::i32, in SelectInlineAsm() local
249 SDValue T0 = CurDAG->getCopyToReg(Sub0, dl, Reg0, Sub0, in SelectInlineAsm()
/external/vulkan-validation-layers/libs/glm/gtx/
Dsimd_vec4.inl319 __m128 Sub0 = _mm_sub_ps(Flr0, x.Data); local
325 __m128 And0 = _mm_and_ps(Sub0, Cmp0);
453 __m128 Sub0 = _mm_sub_ps(y.Data, x.Data); local
454 __m128 Mul0 = _mm_mul_ps(a.Data, Sub0);
/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelDAGToDAG.cpp715 SDValue Sub0 = CurDAG->getTargetConstant(AMDGPU::sub0, DL, MVT::i32); in SelectADD_SUB_I64() local
719 DL, MVT::i32, LHS, Sub0); in SelectADD_SUB_I64()
724 DL, MVT::i32, RHS, Sub0); in SelectADD_SUB_I64()
744 Sub0, in SelectADD_SUB_I64()
/external/llvm/lib/Target/ARM/
DARMISelDAGToDAG.cpp1927 unsigned Sub0 = (is64BitVector ? ARM::dsub_0 : ARM::qsub_0); in SelectVLD() local
1930 CurDAG->getTargetExtractSubreg(Sub0 + Vec, dl, VT, SuperReg)); in SelectVLD()
2193 unsigned Sub0 = is64BitVector ? ARM::dsub_0 : ARM::qsub_0; in SelectVLDSTLane() local
2196 CurDAG->getTargetExtractSubreg(Sub0 + Vec, dl, VT, SuperReg)); in SelectVLDSTLane()
3853 SDValue Sub0 = CurDAG->getTargetExtractSubreg(ARM::gsub_0, dl, MVT::i32, in SelectInlineAsm() local
3857 SDValue T0 = CurDAG->getCopyToReg(Sub0, dl, Reg0, Sub0, in SelectInlineAsm()