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/external/llvm/lib/CodeGen/SelectionDAG/
DScheduleDAGRRList.cpp865 for (auto &Succ2 : SU->Succs) { in UnscheduleNodeBottomUp() local
866 if (Succ2.isAssignedRegDep() && Succ2.getReg() == Reg && in UnscheduleNodeBottomUp()
867 Succ2.getSUnit()->getHeight() < LiveRegGens[Reg]->getHeight()) in UnscheduleNodeBottomUp()
868 LiveRegGens[Reg] = Succ2.getSUnit(); in UnscheduleNodeBottomUp()