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Searched refs:TGSI_OPCODE_MAD (Results 1 – 17 of 17) sorted by relevance

/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_util.c193 case TGSI_OPCODE_MAD: in tgsi_util_get_inst_usage_mask()
Dtgsi_info.c56 { 1, 3, 0, 0, 0, 0, COMP, "MAD", TGSI_OPCODE_MAD },
Dtgsi_ppc.c688 case TGSI_OPCODE_MAD: in emit_triop()
1121 case TGSI_OPCODE_MAD: in emit_instruction()
Dtgsi_exec.c3520 case TGSI_OPCODE_MAD: in exec_instruction()
/external/mesa3d/src/gallium/include/pipe/
Dp_shader_tokens.h274 #define TGSI_OPCODE_MAD 16 macro
/external/mesa3d/src/gallium/drivers/r300/
Dr300_tgsi_to_rc.c51 case TGSI_OPCODE_MAD: return RC_OPCODE_MAD; in translate_opcode()
/external/mesa3d/src/gallium/auxiliary/gallivm/
Dlp_bld_tgsi_action.c546 TGSI_OPCODE_MAD, emit_data->args[0], tmp, emit_data->args[2]); in lrp_emit()
811 bld_base->op_actions[TGSI_OPCODE_MAD].emit = mad_emit; in lp_set_default_actions()
Dlp_bld_tgsi_aos.c565 case TGSI_OPCODE_MAD: in lp_emit_instruction_aos()
/external/mesa3d/src/gallium/drivers/radeon/
Dradeon_setup_tgsi_llvm.c1144 bld_base->op_actions[TGSI_OPCODE_MAD].emit = build_tgsi_intrinsic_nomem; in radeon_llvm_context_init()
1145 bld_base->op_actions[TGSI_OPCODE_MAD].intr_name = "llvm.AMDIL.mad."; in radeon_llvm_context_init()
/external/mesa3d/src/mesa/state_tracker/
Dst_mesa_to_tgsi.c605 return TGSI_OPCODE_MAD; in translate_opcode()
Dst_glsl_to_tgsi.cpp1222 emit(ir, TGSI_OPCODE_MAD, result_dst, a, b, c); in try_emit_mad()
1262 emit(ir, TGSI_OPCODE_MAD, st_dst_reg(this->result), a, b, a); in try_emit_mad_for_and_not()
3736 inst = v->emit(NULL, TGSI_OPCODE_MAD, dst0, src0, scale, bias); in get_pixel_transfer_visitor()
/external/mesa3d/src/gallium/drivers/i915/
Di915_fpc_translate.c759 case TGSI_OPCODE_MAD: in i915_translate_instruction()
/external/mesa3d/src/gallium/drivers/nv30/
Dnvfx_vertprog.c624 case TGSI_OPCODE_MAD: in nvfx_vertprog_parse_instruction()
Dnvfx_fragprog.c653 case TGSI_OPCODE_MAD: in nvfx_fragprog_parse_instruction()
/external/mesa3d/src/gallium/drivers/r600/
Dr600_shader.c5256 {TGSI_OPCODE_MAD, 1, V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD, tgsi_op3},
5430 {TGSI_OPCODE_MAD, 1, EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD, tgsi_op3},
5604 {TGSI_OPCODE_MAD, 1, EG_V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_MULADD, tgsi_op3},
/external/mesa3d/src/gallium/drivers/svga/
Dsvga_tgsi_insn.c53 case TGSI_OPCODE_MAD: return SVGA3DOP_MAD; in translate_opcode()
/external/mesa3d/src/gallium/drivers/nv50/codegen/
Dnv50_ir_from_tgsi.cpp1781 case TGSI_OPCODE_MAD: in handleInstruction()