Searched refs:TPIDR_EL0 (Results 1 – 10 of 10) sorted by relevance
/external/llvm/test/CodeGen/AArch64/ |
D | arm64-tls-execs.ll | 12 ; CHECK: mrs x[[TP:[0-9]+]], TPIDR_EL0 27 ; CHECK: mrs [[TP:x[0-9]+]], TPIDR_EL0 41 ; CHECK: mrs x[[R1:[0-9]+]], TPIDR_EL0 55 ; CHECK: mrs x[[R1:[0-9]+]], TPIDR_EL0
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D | arm64-tls-dynamics.ll | 27 ; CHECK: mrs x[[TP:[0-9]+]], TPIDR_EL0 29 ; CHECK-NOLD: mrs x[[TP:[0-9]+]], TPIDR_EL0 55 ; CHECK: mrs [[TP:x[0-9]+]], TPIDR_EL0 85 ; CHECK: mrs x[[TPIDR:[0-9]+]], TPIDR_EL0 93 ; CHECK-NOLD: mrs x[[TPIDR:[0-9]+]], TPIDR_EL0 121 ; CHECK: mrs x[[TPIDR:[0-9]+]], TPIDR_EL0 129 ; CHECK-NOLD: mrs x[[TPIDR:[0-9]+]], TPIDR_EL0
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D | arm64-builtins-linux.ll | 8 ; CHECK: mrs {{x[0-9]+}}, TPIDR_EL0
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/external/llvm/test/MC/AArch64/ |
D | arm64-system-encoding.s | 121 msr TPIDR_EL0, x3 201 ; CHECK: msr TPIDR_EL0, x3 ; encoding: [0x43,0xd0,0x1b,0xd5] 306 mrs x3, TPIDR_EL0 491 ; CHECK: mrs x3, TPIDR_EL0 ; encoding: [0x43,0xd0,0x3b,0xd5]
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D | basic-a64-instructions.s | 3872 msr TPIDR_EL0, x12 4426 mrs x9, TPIDR_EL0
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/external/llvm/lib/Target/AArch64/Utils/ |
D | AArch64BaseInfo.cpp | 467 {"tpidr_el0", TPIDR_EL0, {}},
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D | AArch64BaseInfo.h | 866 TPIDR_EL0 = 0xde82, // 11 011 1101 0000 010 enumerator
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/external/valgrind/memcheck/ |
D | mc_machine.c | 992 if (o == GOF(TPIDR_EL0) && sz == 8) return -1; // untracked in get_otrack_shadow_offset_wrk()
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | basic-a64-instructions.txt | 3344 # CHECK: msr {{tpidr_el0|TPIDR_EL0}}, x12 3643 # CHECK: mrs x9, {{tpidr_el0|TPIDR_EL0}}
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 131 // (the TPIDR_EL0 offset is put directly in X0, hence no "result" here) 416 // TPIDR_EL0.
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