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Searched refs:Udiv (Results 1 – 6 of 6) sorted by relevance

/external/v8/src/compiler/arm64/
Dcode-generator-arm64.cc734 __ Udiv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); in AssembleArchInstruction() local
737 __ Udiv(i.OutputRegister32(), i.InputRegister32(0), i.InputRegister32(1)); in AssembleArchInstruction() local
757 __ Udiv(temp, i.InputRegister(0), i.InputRegister(1)); in AssembleArchInstruction() local
764 __ Udiv(temp, i.InputRegister32(0), i.InputRegister32(1)); in AssembleArchInstruction() local
/external/v8/test/cctest/
Dtest-assembler-arm64.cc1447 __ Udiv(w0, w16, w16); in TEST() local
1448 __ Udiv(w1, w17, w16); in TEST() local
1453 __ Udiv(x5, x16, x16); in TEST() local
1454 __ Udiv(x6, x17, x18); in TEST() local
1459 __ Udiv(w10, w19, w21); in TEST() local
1461 __ Udiv(x12, x19, x21); in TEST() local
1463 __ Udiv(x14, x20, x21); in TEST() local
1466 __ Udiv(w22, w19, w17); in TEST() local
1468 __ Udiv(x24, x20, x18); in TEST() local
1471 __ Udiv(x26, x16, x21); in TEST() local
[all …]
/external/v8/src/arm64/
Dmacro-assembler-arm64-inl.h1177 void MacroAssembler::Udiv(const Register& rd, in Udiv() function
Dmacro-assembler-arm64.h529 inline void Udiv(const Register& rd, const Register& rn, const Register& rm);
/external/vixl/test/
Dtest-assembler-a64.cc1471 __ Udiv(w0, w16, w16); in TEST() local
1472 __ Udiv(w1, w17, w16); in TEST() local
1477 __ Udiv(x5, x16, x16); in TEST() local
1478 __ Udiv(x6, x17, x18); in TEST() local
1483 __ Udiv(w10, w19, w21); in TEST() local
1485 __ Udiv(x12, x19, x21); in TEST() local
1487 __ Udiv(x14, x20, x21); in TEST() local
1490 __ Udiv(w22, w19, w17); in TEST() local
1492 __ Udiv(x24, x20, x18); in TEST() local
1495 __ Udiv(x26, x16, x21); in TEST() local
[all …]
/external/vixl/src/vixl/a64/
Dmacro-assembler-a64.h2026 void Udiv(const Register& rd, const Register& rn, const Register& rm) { in Udiv() function