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Searched refs:UsedRegs (Results 1 – 12 of 12) sorted by relevance

/external/llvm/lib/Target/AArch64/
DAArch64LoadStoreOptimizer.cpp806 BitVector &UsedRegs, in trackRegDefsUses() argument
821 UsedRegs.set(*AI); in trackRegDefsUses()
903 BitVector ModifiedRegs, UsedRegs; in findMatchingInsn() local
905 UsedRegs.resize(TRI->getNumRegs()); in findMatchingInsn()
960 trackRegDefsUses(MI, ModifiedRegs, UsedRegs, TRI); in findMatchingInsn()
970 trackRegDefsUses(MI, ModifiedRegs, UsedRegs, TRI); in findMatchingInsn()
979 trackRegDefsUses(MI, ModifiedRegs, UsedRegs, TRI); in findMatchingInsn()
991 trackRegDefsUses(MI, ModifiedRegs, UsedRegs, TRI); in findMatchingInsn()
1001 !(MI->mayLoad() && UsedRegs[getLdStRegOp(MI).getReg()]) && in findMatchingInsn()
1012 !(MayLoad && UsedRegs[getLdStRegOp(FirstMI).getReg()]) && in findMatchingInsn()
[all …]
/external/llvm/lib/Target/X86/
DX86CallFrameOptimization.cpp101 DenseSet<unsigned int> &UsedRegs);
257 const X86RegisterInfo &RegInfo, DenseSet<unsigned int> &UsedRegs) { in classifyInstruction() argument
303 for (unsigned int U : UsedRegs) in classifyInstruction()
361 DenseSet<unsigned int> UsedRegs; in collectCallInfo() local
363 while ((Classification = classifyInstruction(MBB, I, RegInfo, UsedRegs)) != in collectCallInfo()
410 UsedRegs.insert(Reg); in collectCallInfo()
/external/llvm/lib/Target/AMDGPU/
DSIInsertWaits.cpp74 RegCounters UsedRegs; member in __anon364952ee0111::SIInsertWaits
315 UsedRegs[j] = Limit; in pushInstruction()
416 increaseCounters(Result, UsedRegs[j]); in handleOperands()
469 memset(&UsedRegs, 0, sizeof(UsedRegs)); in runOnMachineFunction()
/external/llvm/lib/Target/ARM/
DThumb1FrameLowering.cpp469 LivePhysRegs UsedRegs(STI.getRegisterInfo()); in emitPopSpecialFixUp() local
470 UsedRegs.addLiveOuts(&MBB, /*AddPristines*/ true); in emitPopSpecialFixUp()
478 UsedRegs.addReg(CSRegs[i]); in emitPopSpecialFixUp()
487 UsedRegs.stepBackward(*--InstUpToMBBI); in emitPopSpecialFixUp()
507 if (!UsedRegs.contains(Register)) { in emitPopSpecialFixUp()
DARMFastISel.cpp206 bool FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs,
2023 bool ARMFastISel::FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs, in FinishCall() argument
2050 UsedRegs.push_back(RVLocs[0].getLocReg()); in FinishCall()
2051 UsedRegs.push_back(RVLocs[1].getLocReg()); in FinishCall()
2069 UsedRegs.push_back(RVLocs[0].getLocReg()); in FinishCall()
2269 SmallVector<unsigned, 4> UsedRegs; in ARMEmitLibcall() local
2270 if (!FinishCall(RetVT, UsedRegs, I, CC, NumBytes, false)) return false; in ARMEmitLibcall()
2273 static_cast<MachineInstr *>(MIB)->setPhysRegsDeadExcept(UsedRegs, TRI); in ARMEmitLibcall()
2420 SmallVector<unsigned, 4> UsedRegs; in SelectCall() local
2421 if (!FinishCall(RetVT, UsedRegs, I, CC, NumBytes, isVarArg)) in SelectCall()
[all …]
DARMLoadStoreOptimizer.cpp803 DenseSet<unsigned> UsedRegs; in MergeOpsUpdate() local
812 UsedRegs.insert(Reg); in MergeOpsUpdate()
902 if (UsedRegs.count(MO.getReg())) in MergeOpsUpdate()
/external/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.cpp831 SmallVector<unsigned, 8> UsedRegs; in EmitMachineNode() local
840 UsedRegs.push_back(Reg); in EmitMachineNode()
849 UsedRegs.push_back(cast<RegisterSDNode>(F->getOperand(1))->getReg()); in EmitMachineNode()
857 UsedRegs.append(MCID.getImplicitUses(), in EmitMachineNode()
865 UsedRegs.push_back(Reg); in EmitMachineNode()
871 if (!UsedRegs.empty() || II.getImplicitDefs()) in EmitMachineNode()
872 MIB->setPhysRegsDeadExcept(UsedRegs, *TRI); in EmitMachineNode()
/external/llvm/lib/CodeGen/
DCallingConvLower.cpp38 UsedRegs.resize((TRI.getNumRegs()+31)/32); in CCState()
64 UsedRegs[*AI/32] |= 1 << (*AI&31); in MarkAllocated()
DMachineBasicBlock.cpp788 SmallVector<unsigned, 4> UsedRegs; in SplitCriticalEdge() local
800 if (std::find(UsedRegs.begin(), UsedRegs.end(), Reg) == UsedRegs.end()) in SplitCriticalEdge()
801 UsedRegs.push_back(Reg); in SplitCriticalEdge()
941 LIS->repairIntervalsInRange(this, getFirstTerminator(), end(), UsedRegs); in SplitCriticalEdge()
DMachineInstr.cpp1964 void MachineInstr::setPhysRegsDeadExcept(ArrayRef<unsigned> UsedRegs, in setPhysRegsDeadExcept() argument
1976 if (std::none_of(UsedRegs.begin(), UsedRegs.end(), in setPhysRegsDeadExcept()
1984 for (ArrayRef<unsigned>::iterator I = UsedRegs.begin(), E = UsedRegs.end(); in setPhysRegsDeadExcept()
/external/llvm/include/llvm/CodeGen/
DCallingConvLower.h205 SmallVector<uint32_t, 16> UsedRegs; variable
290 return UsedRegs[Reg/32] & (1 << (Reg&31)); in isAllocated()
DMachineInstr.h1077 void setPhysRegsDeadExcept(ArrayRef<unsigned> UsedRegs,