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Searched refs:VEX_W (Results 1 – 10 of 10) sorted by relevance

/external/llvm/lib/Target/X86/
DX86InstrFMA.td107 loadv4f64, X86Fmadd, v2f64, v4f64>, VEX_W;
109 loadv4f64, X86Fmsub, v2f64, v4f64>, VEX_W;
112 v2f64, v4f64>, VEX_W;
115 v2f64, v4f64>, VEX_W;
127 loadv4f64, X86Fnmadd, v2f64, v4f64>, VEX_W;
130 v4f64>, VEX_W;
235 VEX_W;
276 (OpVT (OpNode RC:$src1, RC:$src2, RC:$src3)))]>, VEX_W, VEX_LIG, MemOp4;
282 (mem_frag addr:$src3)))]>, VEX_W, VEX_LIG, MemOp4;
307 (Int VR128:$src1, VR128:$src2, VR128:$src3))]>, VEX_W, VEX_LIG, MemOp4;
[all …]
DX86InstrAVX512.td552 vinsert256_insert>, VEX_W, EVEX_V512;
558 vinsert128_insert>, VEX_W, EVEX_V256;
564 vinsert128_insert>, VEX_W, EVEX_V512;
720 VEX_W, EVEX_V512, EVEX_CD8<64, CD8VT4>;
732 VEX_W, EVEX_V256, EVEX_CD8<64, CD8VT2>;
738 VEX_W, EVEX_V512, EVEX_CD8<64, CD8VT2>;
864 avx512vl_f64_info>, VEX_W;
940 HasAVX512>, VEX_W;
999 avx512vl_i64_info, HasAVX512>, VEX_W;
1029 v8i64_info, v4i64x_info>, VEX_W,
[all …]
DX86InstrXOP.td100 XOP_4V, VEX_W, Sched<[WriteVarVecShift, ReadAfterLd]>;
240 XOP_4V, VEX_I8IMM, VEX_W, MemOp4;
270 XOP_4V, VEX_I8IMM, VEX_W, MemOp4, VEX_L;
308 VEX_W, MemOp4;
327 VEX_W, MemOp4, VEX_L;
DX86InstrFormats.td191 class VEX_W { bit hasVEX_WPrefix = 1; }
266 bit hasVEX_WPrefix = 0; // Does this inst set the VEX_W field?
283 bit hasMemOp4Prefix = 0; // Same bit as VEX_W, but used for swapping operands
912 : VS2I<o, F, outs, ins, asm, pattern, itin>, VEX_W;
DX86InstrShiftRotate.td894 defm RORX64 : bmi_rotate<"rorx{q}", GR64, i64mem>, VEX_W;
896 defm SARX64 : bmi_shift<"sarx{q}", GR64, i64mem>, T8XS, VEX_W;
898 defm SHRX64 : bmi_shift<"shrx{q}", GR64, i64mem>, T8XD, VEX_W;
900 defm SHLX64 : bmi_shift<"shlx{q}", GR64, i64mem>, T8PD, VEX_W;
DX86InstrInfo.td2189 defm BLSR64 : bmi_bls<"blsr{q}", MRM1r, MRM1m, GR64, i64mem>, VEX_W;
2191 defm BLSMSK64 : bmi_bls<"blsmsk{q}", MRM2r, MRM2m, GR64, i64mem>, VEX_W;
2193 defm BLSI64 : bmi_bls<"blsi{q}", MRM3r, MRM3m, GR64, i64mem>, VEX_W;
2276 int_x86_bmi_bextr_64, loadi64>, VEX_W;
2283 int_x86_bmi_bzhi_64, loadi64>, VEX_W;
2346 int_x86_bmi_pdep_64, loadi64>, T8XD, VEX_W;
2350 int_x86_bmi_pext_64, loadi64>, T8XS, VEX_W;
2380 i64immSExt32>, VEX_W;
2401 loadi64>, VEX_W;
DX86InstrSSE.td1514 XS, VEX, VEX_W, VEX_LIG;
1522 XD, VEX, VEX_W, VEX_LIG;
1548 XS, VEX_4V, VEX_W, VEX_LIG;
1552 XD, VEX_4V, VEX_W, VEX_LIG;
1667 SSE_CVT_SD2SI>, XD, VEX, VEX_W, VEX_LIG;
1683 VEX_W;
1690 VEX_4V, VEX_W;
1719 XS, VEX, VEX_W;
1726 XD, VEX, VEX_W;
1748 SSE_CVT_SS2SI_64>, XS, VEX, VEX_W, VEX_LIG;
[all …]
DX86InstrArithmetic.td1284 defm ANDN64 : bmi_andn<"andn{q}", GR64, i64mem, loadi64>, T8PS, VEX_4V, VEX_W;
1319 defm MULX64 : bmi_mulx<"mulx{q}", GR64, i64mem>, VEX_W;
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp625 unsigned char VEX_W = 0; in EmitVEXOpcodePrefix() local
679 if (TSFlags & X86II::VEX_W) in EmitVEXOpcodePrefix()
680 VEX_W = 1; in EmitVEXOpcodePrefix()
937 if (Encoding == X86II::VEX && VEX_B && VEX_X && !VEX_W && (VEX_5M == 1)) { in EmitVEXOpcodePrefix()
946 EmitByte(LastByte | (VEX_W << 7), CurByte, OS); in EmitVEXOpcodePrefix()
965 EmitByte((VEX_W << 7) | in EmitVEXOpcodePrefix()
DX86BaseInfo.h484 VEX_W = 1ULL << VEX_WShift, enumerator