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Searched refs:VLD2DUP (Results 1 – 4 of 4) sorted by relevance

/external/llvm/lib/Target/ARM/
DARMISelLowering.h191 VLD2DUP = ISD::FIRST_TARGET_MEMORY_OPCODE, enumerator
DARMInstrNEON.td1452 // VLD2DUP : Vector Load (single 2-element structure to all lanes)
1453 class VLD2DUP<bits<4> op7_4, string Dt, RegisterOperand VdTy, Operand AddrMode>
1462 def VLD2DUPd8 : VLD2DUP<{0,0,0,?}, "8", VecListDPairAllLanes,
1464 def VLD2DUPd16 : VLD2DUP<{0,1,0,?}, "16", VecListDPairAllLanes,
1466 def VLD2DUPd32 : VLD2DUP<{1,0,0,?}, "32", VecListDPairAllLanes,
1472 def VLD2DUPd8x2 : VLD2DUP<{0,0,1,?}, "8", VecListDPairSpacedAllLanes,
1474 def VLD2DUPd16x2 : VLD2DUP<{0,1,1,?}, "16", VecListDPairSpacedAllLanes,
1476 def VLD2DUPd32x2 : VLD2DUP<{1,0,1,?}, "32", VecListDPairSpacedAllLanes,
DARMISelLowering.cpp1210 case ARMISD::VLD2DUP: return "ARMISD::VLD2DUP"; in getTargetNodeName()
9552 case ARMISD::VLD2DUP: NewOpc = ARMISD::VLD2DUP_UPD; NumVecs = 2; break; in CombineBaseUpdate()
9719 NewOpc = ARMISD::VLD2DUP; in CombineVLDDUP()
10598 case ARMISD::VLD2DUP: in PerformDAGCombine()
DARMISelDAGToDAG.cpp2845 case ARMISD::VLD2DUP: { in Select()