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Searched refs:VREV16 (Results 1 – 5 of 5) sorted by relevance

/external/llvm/lib/Target/ARM/
DARMISelLowering.h154 VREV16, // reverse elements within 16-bit halfwords enumerator
DARMScheduleSwift.td549 (instregex "VEXT", "VREV16", "VREV32", "VREV64")>;
DARMISelLowering.cpp1194 case ARMISD::VREV16: return "ARMISD::VREV16"; in getTargetNodeName()
4446 SDValue N2 = DAG.getNode(ARMISD::VREV16, DL, VT8Bit, N1); in getCTPOP16BitCounts()
5862 return DAG.getNode(ARMISD::VREV16, dl, VT, OpLHS); in GeneratePerfectShuffle()
5986 return DAG.getNode(ARMISD::VREV16, dl, VT, V1); in LowerVECTOR_SHUFFLE()
DARMInstrNEON.td576 def NEONvrev16 : SDNode<"ARMISD::VREV16", SDTARMVSHUF>;
6303 // VREV16 : Vector Reverse elements within 16-bit halfwords
/external/clang/include/clang/Basic/
Darm_neon.td782 def VREV16 : WOpInst<"vrev16", "dd", "cUcPcQcQUcQPc", OP_REV16>;