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Searched refs:VTRN (Results 1 – 12 of 12) sorted by relevance

/external/llvm/test/MC/ARM/
Dneon-shuffle-encoding.s79 @ VTRN alternate size suffices
/external/llvm/test/CodeGen/AArch64/
Darm64-trn.ll108 ; Undef shuffle indices should not prevent matching to VTRN:
/external/llvm/lib/Target/ARM/
DARMISelLowering.h157 VTRN, // transpose enumerator
DARMScheduleSwift.td584 (instregex "VSWP", "VTRN", "VUZP", "VZIP")>;
DARMISelLowering.cpp1197 case ARMISD::VTRN: return "ARMISD::VTRN"; in getTargetNodeName()
5306 return ARMISD::VTRN; in isNEONTwoResultShuffleMask()
5314 return ARMISD::VTRN; in isNEONTwoResultShuffleMask()
5885 return DAG.getNode(ARMISD::VTRN, dl, DAG.getVTList(VT, VT), in GeneratePerfectShuffle()
DARMISelDAGToDAG.cpp2810 case ARMISD::VTRN: { in Select()
DARMInstrNEON.td583 def NEONtrn : SDNode<"ARMISD::VTRN", SDTARMVSHUF2>;
2532 // 2-register shuffles (VTRN/VZIP/VUZP), both double- and quad-register.
6401 // VTRN : Vector Transpose
/external/llvm/test/CodeGen/ARM/
Dvzip.ll67 ; VZIP.32 is equivalent to VTRN.32 for 64-bit vectors.
Dvuzp.ll67 ; VUZP.32 is equivalent to VTRN.32 for 64-bit vectors.
/external/clang/include/clang/Basic/
Darm_neon.td810 def VTRN : WInst<"vtrn", "2dd", "csiUcUsUifPcPsQcQsQiQUcQUsQUiQfQPcQPs">;
/external/valgrind/none/tests/arm/
Dneon128.stdout.exp2131 ---- VTRN ----
Dneon64.stdout.exp3380 ---- VTRN ----