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Searched refs:ValVT (Results 1 – 21 of 21) sorted by relevance

/external/llvm/lib/Target/ARM/
DARMCallingConv.h28 static bool f64AssignAPCS(unsigned &ValNo, MVT &ValVT, MVT &LocVT, in f64AssignAPCS() argument
35 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in f64AssignAPCS()
42 State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT, in f64AssignAPCS()
50 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in f64AssignAPCS()
52 State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT, in f64AssignAPCS()
58 static bool CC_ARM_APCS_Custom_f64(unsigned &ValNo, MVT &ValVT, MVT &LocVT, in CC_ARM_APCS_Custom_f64() argument
62 if (!f64AssignAPCS(ValNo, ValVT, LocVT, LocInfo, State, true)) in CC_ARM_APCS_Custom_f64()
65 !f64AssignAPCS(ValNo, ValVT, LocVT, LocInfo, State, false)) in CC_ARM_APCS_Custom_f64()
71 static bool f64AssignAAPCS(unsigned &ValNo, MVT &ValVT, MVT &LocVT, in f64AssignAAPCS() argument
91 State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT, in f64AssignAAPCS()
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/external/llvm/include/llvm/CodeGen/
DCallingConvLower.h71 MVT ValVT; variable
77 static CCValAssign getReg(unsigned ValNo, MVT ValVT, in getReg() argument
86 Ret.ValVT = ValVT; in getReg()
91 static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT, in getCustomReg() argument
95 Ret = getReg(ValNo, ValVT, RegNo, LocVT, HTP); in getCustomReg()
100 static CCValAssign getMem(unsigned ValNo, MVT ValVT, in getMem() argument
109 Ret.ValVT = ValVT; in getMem()
114 static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT, in getCustomMem() argument
118 Ret = getMem(ValNo, ValVT, Offset, LocVT, HTP); in getCustomMem()
125 static CCValAssign getPending(unsigned ValNo, MVT ValVT, MVT LocVT,
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/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp105 CC_Hexagon(unsigned ValNo, MVT ValVT,
110 CC_Hexagon32(unsigned ValNo, MVT ValVT,
115 CC_Hexagon64(unsigned ValNo, MVT ValVT,
120 CC_HexagonVector(unsigned ValNo, MVT ValVT,
125 RetCC_Hexagon(unsigned ValNo, MVT ValVT,
130 RetCC_Hexagon32(unsigned ValNo, MVT ValVT,
135 RetCC_Hexagon64(unsigned ValNo, MVT ValVT,
140 RetCC_HexagonVector(unsigned ValNo, MVT ValVT,
145 CC_Hexagon_VarArg (unsigned ValNo, MVT ValVT, in CC_Hexagon_VarArg() argument
152 return CC_Hexagon(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State); in CC_Hexagon_VarArg()
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/external/llvm/lib/Target/AArch64/
DAArch64CallingConvention.h66 unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, in CC_AArch64_Custom_Stack_Block() argument
73 CCValAssign::getPending(ValNo, ValVT, LocVT, LocInfo)); in CC_AArch64_Custom_Stack_Block()
84 static bool CC_AArch64_Custom_Block(unsigned &ValNo, MVT &ValVT, MVT &LocVT, in CC_AArch64_Custom_Block() argument
110 CCValAssign::getPending(ValNo, ValVT, LocVT, LocInfo)); in CC_AArch64_Custom_Block()
DAArch64CallingConvention.td158 CCIf<"ValVT == MVT::i1 || ValVT == MVT::i8", CCAssignToStack<1, 1>>,
159 CCIf<"ValVT == MVT::i16 || ValVT == MVT::f16", CCAssignToStack<2, 2>>,
DAArch64ISelLowering.cpp2387 MVT ValVT = Ins[i].VT; in LowerFormalArguments() local
2398 ValVT = MVT::i8; in LowerFormalArguments()
2400 ValVT = MVT::i16; in LowerFormalArguments()
2404 AssignFn(i, ValVT, ValVT, CCValAssign::Full, Ins[i].Flags, CCInfo); in LowerFormalArguments()
2921 MVT ValVT = Outs[i].VT; in LowerCall() local
2926 MVT ActualMVT = ActualVT.isSimple() ? ActualVT.getSimpleVT() : ValVT; in LowerCall()
2930 ValVT = MVT::i8; in LowerCall()
2932 ValVT = MVT::i16; in LowerCall()
2935 bool Res = AssignFn(i, ValVT, ValVT, CCValAssign::Full, ArgFlags, CCInfo); in LowerCall()
/external/llvm/include/llvm/Target/
DTargetLowering.h590 LegalizeAction getLoadExtAction(unsigned ExtType, EVT ValVT, in getLoadExtAction() argument
592 if (ValVT.isExtended() || MemVT.isExtended()) return Expand; in getLoadExtAction()
593 unsigned ValI = (unsigned) ValVT.getSimpleVT().SimpleTy; in getLoadExtAction()
601 bool isLoadExtLegal(unsigned ExtType, EVT ValVT, EVT MemVT) const { in isLoadExtLegal() argument
602 return ValVT.isSimple() && MemVT.isSimple() && in isLoadExtLegal()
603 getLoadExtAction(ExtType, ValVT, MemVT) == Legal; in isLoadExtLegal()
608 bool isLoadExtLegalOrCustom(unsigned ExtType, EVT ValVT, EVT MemVT) const { in isLoadExtLegalOrCustom() argument
609 return ValVT.isSimple() && MemVT.isSimple() && in isLoadExtLegalOrCustom()
610 (getLoadExtAction(ExtType, ValVT, MemVT) == Legal || in isLoadExtLegalOrCustom()
611 getLoadExtAction(ExtType, ValVT, MemVT) == Custom); in isLoadExtLegalOrCustom()
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/external/llvm/lib/Target/X86/
DX86CallingConv.h23 inline bool CC_X86_32_VectorCallIndirect(unsigned &ValNo, MVT &ValVT, in CC_X86_32_VectorCallIndirect() argument
DX86ISelLowering.cpp2217 EVT ValVT = ValToCopy.getValueType(); in LowerReturn() local
2225 if (ValVT.isVector() && ValVT.getVectorElementType() == MVT::i1) in LowerReturn()
2238 if ((ValVT == MVT::f32 || ValVT == MVT::f64 || in LowerReturn()
2246 if (ValVT == MVT::f64 && in LowerReturn()
2266 if (ValVT == MVT::x86mmx) { in LowerReturn()
2545 EVT ValVT; in LowerMemArgument() local
2553 ValVT = VA.getLocVT(); in LowerMemArgument()
2555 ValVT = VA.getValVT(); in LowerMemArgument()
2584 int FI = MFI->CreateFixedObject(ValVT.getSizeInBits()/8, in LowerMemArgument()
2593 ValVT, dl, Chain, FIN, in LowerMemArgument()
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeTypes.cpp1122 SDValue DAGTypeLegalizer::PromoteTargetBoolean(SDValue Bool, EVT ValVT) { in PromoteTargetBoolean() argument
1124 EVT BoolVT = getSetCCResultType(ValVT); in PromoteTargetBoolean()
1126 TargetLowering::getExtendForContent(TLI.getBooleanContents(ValVT)); in PromoteTargetBoolean()
1133 SDValue DAGTypeLegalizer::WidenTargetBoolean(SDValue Bool, EVT ValVT, in WidenTargetBoolean() argument
1138 assert(ValVT.getVectorNumElements() > BoolVT.getVectorNumElements() && in WidenTargetBoolean()
1139 TLI.isTypeLegal(ValVT) && in WidenTargetBoolean()
1142 ValVT.getVectorNumElements()); in WidenTargetBoolean()
1144 return PromoteTargetBoolean(Bool, ValVT); in WidenTargetBoolean()
DLegalizeVectorOps.cpp232 MVT ValVT = ST->getValue().getSimpleValueType(); in LegalizeOp() local
234 switch (TLI.getTruncStoreAction(ValVT, StVT)) { in LegalizeOp()
DLegalizeTypes.h189 SDValue PromoteTargetBoolean(SDValue Bool, EVT ValVT);
193 SDValue WidenTargetBoolean(SDValue Bool, EVT ValVT, bool WithZeroes = false);
DLegalizeVectorTypes.cpp3595 EVT ValVT = ValOp.getValueType(); in GenWidenVectorStores() local
3596 unsigned ValWidth = ValVT.getSizeInBits(); in GenWidenVectorStores()
3597 EVT ValEltVT = ValVT.getVectorElementType(); in GenWidenVectorStores()
3605 EVT NewVT = FindMemType(DAG, TLI, StWidth, ValVT); in GenWidenVectorStores()
3668 EVT ValVT = ValOp.getValueType(); in GenWidenVectorTruncStores() local
3679 EVT ValEltVT = ValVT.getVectorElementType(); in GenWidenVectorTruncStores()
/external/llvm/lib/Target/Mips/
DMipsISelLowering.cpp2369 static bool CC_MipsO32(unsigned ValNo, MVT ValVT, MVT LocVT, in CC_MipsO32() argument
2414 bool isI64 = (ValVT == MVT::i32 && OrigAlign == 8); in CC_MipsO32()
2416 if (ValVT == MVT::i32 || (ValVT == MVT::f32 && AllocateFloatsInIntReg)) { in CC_MipsO32()
2423 } else if (ValVT == MVT::f64 && AllocateFloatsInIntReg) { in CC_MipsO32()
2431 } else if (ValVT.isFloatingPoint() && !AllocateFloatsInIntReg) { in CC_MipsO32()
2433 if (ValVT == MVT::f32) { in CC_MipsO32()
2449 unsigned Offset = State.AllocateStack(ValVT.getSizeInBits() >> 3, in CC_MipsO32()
2451 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo)); in CC_MipsO32()
2453 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in CC_MipsO32()
2458 static bool CC_MipsO32_FP32(unsigned ValNo, MVT ValVT, in CC_MipsO32_FP32() argument
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DMipsFastISel.cpp210 static bool CC_Mips(unsigned ValNo, MVT ValVT, MVT LocVT,
214 static bool CC_MipsO32_FP32(unsigned ValNo, MVT ValVT, MVT LocVT, in CC_MipsO32_FP32() argument
220 static bool CC_MipsO32_FP64(unsigned ValNo, MVT ValVT, MVT LocVT, in CC_MipsO32_FP64() argument
/external/llvm/lib/CodeGen/
DCallingConvLower.cpp44 void CCState::HandleByVal(unsigned ValNo, MVT ValVT, in HandleByVal() argument
58 addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo)); in HandleByVal()
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.h884 bool CC_PPC32_SVR4_Custom_Dummy(unsigned &ValNo, MVT &ValVT, MVT &LocVT,
889 bool CC_PPC32_SVR4_Custom_AlignArgRegs(unsigned &ValNo, MVT &ValVT,
895 bool CC_PPC32_SVR4_Custom_AlignFPArgRegs(unsigned &ValNo, MVT &ValVT,
DPPCISelLowering.cpp2566 bool llvm::CC_PPC32_SVR4_Custom_Dummy(unsigned &ValNo, MVT &ValVT, MVT &LocVT, in CC_PPC32_SVR4_Custom_Dummy() argument
2573 bool llvm::CC_PPC32_SVR4_Custom_AlignArgRegs(unsigned &ValNo, MVT &ValVT, in CC_PPC32_SVR4_Custom_AlignArgRegs() argument
2600 bool llvm::CC_PPC32_SVR4_Custom_AlignFPArgRegs(unsigned &ValNo, MVT &ValVT, in CC_PPC32_SVR4_Custom_AlignFPArgRegs() argument
2851 EVT ValVT = VA.getValVT(); in LowerFormalArguments_32SVR4() local
2853 switch (ValVT.getSimpleVT().SimpleTy) { in LowerFormalArguments_32SVR4()
2895 ValVT == MVT::i1 ? MVT::i32 : ValVT); in LowerFormalArguments_32SVR4()
2897 if (ValVT == MVT::i1) in LowerFormalArguments_32SVR4()
/external/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp39 static bool CC_Sparc_Assign_SRet(unsigned &ValNo, MVT &ValVT, in CC_Sparc_Assign_SRet() argument
46 State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT, in CC_Sparc_Assign_SRet()
52 static bool CC_Sparc_Assign_Split_64(unsigned &ValNo, MVT &ValVT, in CC_Sparc_Assign_Split_64() argument
61 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in CC_Sparc_Assign_Split_64()
64 State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT, in CC_Sparc_Assign_Split_64()
72 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in CC_Sparc_Assign_Split_64()
74 State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT, in CC_Sparc_Assign_Split_64()
80 static bool CC_Sparc_Assign_Ret_Split_64(unsigned &ValNo, MVT &ValVT, in CC_Sparc_Assign_Ret_Split_64() argument
90 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in CC_Sparc_Assign_Ret_Split_64()
96 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo)); in CC_Sparc_Assign_Ret_Split_64()
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/external/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp1888 EVT ValVT = Op.getOperand(1).getValueType(); in LowerSTORE() local
1889 if (ValVT == MVT::i1) in LowerSTORE()
1891 else if (ValVT.isVector()) in LowerSTORE()
1902 EVT ValVT = Val.getValueType(); in LowerSTOREVector() local
1904 if (ValVT.isVector()) { in LowerSTOREVector()
1908 if (!ValVT.isSimple()) in LowerSTOREVector()
1910 switch (ValVT.getSimpleVT().SimpleTy) { in LowerSTOREVector()
1932 TD.getPrefTypeAlignment(ValVT.getTypeForEVT(*DAG.getContext())); in LowerSTOREVector()
1943 EVT EltVT = ValVT.getVectorElementType(); in LowerSTOREVector()
1944 unsigned NumElts = ValVT.getVectorNumElements(); in LowerSTOREVector()
/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp34 static bool allocateStack(unsigned ValNo, MVT ValVT, MVT LocVT, in allocateStack() argument
37 unsigned Offset = State.AllocateStack(ValVT.getStoreSize(), in allocateStack()
39 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo)); in allocateStack()