/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeVectorOps.cpp | 515 EVT WideVT = TLI.getPointerTy(DAG.getDataLayout()); in ExpandLoad() local 517 assert(WideVT.isRound() && in ExpandLoad() 520 assert(WideVT.bitsGE(SrcEltVT) && in ExpandLoad() 523 unsigned WideBytes = WideVT.getStoreSize(); in ExpandLoad() 533 ScalarLoad = DAG.getLoad(WideVT, dl, Chain, BasePTR, in ExpandLoad() 540 EVT LoadVT = WideVT; in ExpandLoad() 545 ScalarLoad = DAG.getExtLoad(ISD::EXTLOAD, dl, WideVT, Chain, BasePTR, in ExpandLoad() 565 SDValue SrcEltBitMask = DAG.getConstant((1U << SrcEltBits) - 1, dl, WideVT); in ExpandLoad() 569 unsigned WideBits = WideVT.getSizeInBits(); in ExpandLoad() 576 BitOffset, dl, TLI.getShiftAmountTy(WideVT, DAG.getDataLayout())); in ExpandLoad() [all …]
|
D | LegalizeTypes.cpp | 1141 EVT WideVT = EVT::getVectorVT(*DAG.getContext(), BoolVT.getScalarType(), in WidenTargetBoolean() local 1143 Bool = ModifyToType(Bool, WideVT, WithZeroes); in WidenTargetBoolean()
|
D | LegalizeDAG.cpp | 3597 EVT WideVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits() * 2); in ExpandNode() local 3613 } else if (TLI.isTypeLegal(WideVT)) { in ExpandNode() 3614 LHS = DAG.getNode(Ops[isSigned][2], dl, WideVT, LHS); in ExpandNode() 3615 RHS = DAG.getNode(Ops[isSigned][2], dl, WideVT, RHS); in ExpandNode() 3616 Tmp1 = DAG.getNode(ISD::MUL, dl, WideVT, LHS, RHS); in ExpandNode() 3627 if (WideVT == MVT::i16) in ExpandNode() 3629 else if (WideVT == MVT::i32) in ExpandNode() 3631 else if (WideVT == MVT::i64) in ExpandNode() 3633 else if (WideVT == MVT::i128) in ExpandNode() 3654 SDValue Ret = ExpandLibCall(LC, WideVT, Args, 4, isSigned, dl); in ExpandNode()
|
D | LegalizeVectorTypes.cpp | 2786 EVT WideVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); in WidenVecRes_MGATHER() local 2789 unsigned NumElts = WideVT.getVectorNumElements(); in WidenVecRes_MGATHER() 2793 Mask = WidenTargetBoolean(Mask, WideVT, true); in WidenVecRes_MGATHER() 2802 SDValue Res = DAG.getMaskedGather(DAG.getVTList(WideVT, MVT::Other), in WidenVecRes_MGATHER() 3224 EVT WideVT = WideVal.getValueType(); in WidenVecOp_MSCATTER() local 3229 Mask = WidenTargetBoolean(Mask, WideVT, true); in WidenVecOp_MSCATTER()
|
/external/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 3064 EVT WideVT = MVT::i32; in lowerATOMIC_LOAD_OP() local 3065 if (NarrowVT == WideVT) in lowerATOMIC_LOAD_OP() 3091 BitShift = DAG.getNode(ISD::TRUNCATE, DL, WideVT, BitShift); in lowerATOMIC_LOAD_OP() 3095 SDValue NegBitShift = DAG.getNode(ISD::SUB, DL, WideVT, in lowerATOMIC_LOAD_OP() 3096 DAG.getConstant(0, DL, WideVT), BitShift); in lowerATOMIC_LOAD_OP() 3104 Src2 = DAG.getNode(ISD::SHL, DL, WideVT, Src2, in lowerATOMIC_LOAD_OP() 3105 DAG.getConstant(32 - BitSize, DL, WideVT)); in lowerATOMIC_LOAD_OP() 3108 Src2 = DAG.getNode(ISD::OR, DL, WideVT, Src2, in lowerATOMIC_LOAD_OP() 3109 DAG.getConstant(uint32_t(-1) >> BitSize, DL, WideVT)); in lowerATOMIC_LOAD_OP() 3112 SDVTList VTList = DAG.getVTList(WideVT, MVT::Other); in lowerATOMIC_LOAD_OP() [all …]
|
/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelDAGToDAG.cpp | 1284 EVT WideVT = RegSeq.getOperand(1)->getValueType(0); in SelectLoadLane() local 1288 SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, SuperReg); in SelectLoadLane() 1337 EVT WideVT = RegSeq.getOperand(1)->getValueType(0); in SelectPostLoadLane() local 1341 SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, in SelectPostLoadLane()
|
/external/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.cpp | 2870 EVT WideVT = MVT::i128; in LowerUMULO_SMULO() local 2885 RTLIB::MUL_I128, WideVT, in LowerUMULO_SMULO()
|
/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 13956 EVT WideVT = WideVal.getValueType(); in EmitTest() local 13972 if (TLI.isOperationLegal(WideVal.getOpcode(), WideVT)) { in EmitTest() 25280 EVT WideVT = N0->getOperand(0)->getValueType(0); in WidenMaskArithmetic() local 25281 if (WideVT != VT) in WidenMaskArithmetic() 25294 if (!TLI.isOperationLegalOrPromote(Narrow->getOpcode(), WideVT)) in WidenMaskArithmetic() 25300 N1 = DAG.getNode(ISD::ZERO_EXTEND, DL, WideVT.getVectorElementType(), in WidenMaskArithmetic() 25302 SmallVector<SDValue, 8> C(WideVT.getVectorNumElements(), N1); in WidenMaskArithmetic() 25303 N1 = DAG.getNode(ISD::BUILD_VECTOR, DL, WideVT, C); in WidenMaskArithmetic() 25309 SDValue Op = DAG.getNode(Narrow->getOpcode(), DL, WideVT, N0, N1); in WidenMaskArithmetic()
|