Searched refs:X0000 (Results 1 – 2 of 2) sorted by relevance
| /external/valgrind/VEX/priv/ |
| D | host_arm_defs.c | 2713 #define X0000 BITS4(0,0,0,0) macro
2806 instr = XXXXXX__(X1110,X0011,X1010,X0000,rD,X0000); in imm32_to_ireg()
2982 case ARMalu_AND: subopc = X0000; break; in emit_ARMInstr()
3004 case ARMsh_SHL: subopc = X0000; break; in emit_ARMInstr()
3010 instr |= XXXXX__X(X1110,X0001,X1010,X0000,rD, /* _ _ */ rM); in emit_ARMInstr()
3590 insn = XXXXXXXX(0xE, X1110,X1011,X0000,dD,X1011,X0100,dM); in emit_ARMInstr()
3593 insn = XXXXXXXX(0xE, X1110,X1011,X0000,dD,X1011,X1100,dM); in emit_ARMInstr()
3613 insn = XXXXXXXX(0xE, X1110, BITS4(1,(fD & 1),1,1), X0000, in emit_ARMInstr()
3618 insn = XXXXXXXX(0xE, X1110, BITS4(1,(fD & 1),1,1), X0000, in emit_ARMInstr()
3651 UInt insn = XXXXXXXX(cc, X1110,X1011,X0000,dD,X1011,X0100,dM); in emit_ARMInstr()
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| D | host_arm64_defs.c | 2638 #define X0000 BITS4(0,0,0,0) macro
4035 *p++ = X_3_8_5_6_5_5(X000, X11110011, (X0000 << 1) | b16, in emit_ARM64Instr()
4073 *p++ = X_3_8_5_6_5_5(X000, X11110001, (X0000 << 1) | b16, in emit_ARM64Instr()
4106 case ARM64fpb_MUL: b1512 = X0000; break; in emit_ARM64Instr()
4129 case ARM64fpb_MUL: b1512 = X0000; break; in emit_ARM64Instr()
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